Flash memory containing air gaps

A flash memory, comprising:

• a substrate including a memory cell region;
• a memory transistor array including a plurality of memory transistors, and a plurality of selecting transistors in the memory cell region, wherein each selecting transistor is used for selecting one column of memory transistors in the memory transistor array;
• a buffer oxide layer formed on a portion of a surface of the substrate exposed by the memory transistor array;
• a functional layer conformally formed on and completely covering outer surfaces of the plurality of memory transistors and selecting transistors, as well as a top surface of the buffer oxide layer between adjacent memory transistors and selecting transistors, wherein the functional layer has a roughened surface capable of absorbing water;
• a dielectric layer covering top surfaces of the plurality of memory transistors and selecting transistors and fills gaps between each selecting transistor and a corresponding adjacent memory transistor;
• and
• air gaps formed between adjacent memory transistors, wherein the dielectric layer is formed by using a chemical vapor deposition process, the air gaps are formed by evaporating absorbed water from the roughened surface of the functional layer during the chemical vapor deposition process to form an upward air flow that resists the deposition of the dielectric layer, and the dielectric layer is conformally formed on the functional layer between adjacent selecting transistors, such that no air gaps surrounded by the dielectric layer and the functional layer are formed between adjacent selecting transistors.