Etch stop layer-based approaches for conductive via fabrication and structures resulting therefrom
AssigneeIntel Corporation
InventorsFlorian Gstrein, Cen Tan, Rami Hourani
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AssigneeIntel Corporation
InventorsFlorian Gstrein, Cen Tan, Rami Hourani
Estimating the term…
Etch stop layer-based approaches for via fabrication are described. In an example, an integrated circuit structure includes a plurality of conductive lines in an ILD layer, wherein each of the plurality of conductive lines has a bulk portion including a metal and has an uppermost surface including the metal and a non-metal. A hardmask layer is on the plurality of conductive lines and on an uppermost surface of the ILD layer, and includes a first hardmask component on and aligned with the uppermost surface of the plurality of conductive lines, and a second hardmask component on and aligned with regions of the uppermost surface of the ILD layer. A conductive via is in an opening in the hardmask layer and on a portion of one of the plurality of conductive lines, the portion having a composition different than the uppermost surface including the metal and the non-metal.
An integrated circuit structure, comprising:
An integrated circuit structure, comprising:
A method of fabricating an integrated circuit structure, the method comprising:
Dependencies are inferred from the claim text.