Semiconductor device
AssigneeFuji Electric Co., Ltd.
InventorHiroaki Ichikawa
Life of this patent
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Abstract
A semiconductor device having an arm block. The arm block includes a first circuit pattern that, in a plan view of the semiconductor device, has a recess formed thereon that extends inward from a side thereof, the recess forming a disposition area of the semiconductor device, a second circuit pattern having at least a part disposed in the disposition area, and a plurality of semiconductor chips formed on the first circuit pattern. Each semiconductor chip has a positive electrode on a back surface thereof, and a control electrode and a negative electrode on a front surface thereof, the negative electrode being electrically connected to the second circuit pattern by a wiring member.
Claims14
A semiconductor device, comprising:
- a first arm block including:
- a first circuit pattern that, in a plan view of the semiconductor device, has a first recess formed thereon that extends inward in a first direction from a side thereof, the first recess forming a first disposition area;
- a second circuit pattern having at least a part disposed in the first disposition area;
- and
- a plurality of first semiconductor chips formed on the first circuit pattern, each first semiconductor chip having
- a first positive electrode on a back surface thereof, and
- a first control electrode and a first negative electrode on a front surface thereof, the first negative electrode being electrically connected to the second circuit pattern by a first wiring member;
- and
- a second arm block including:
- a third circuit pattern that, in the plan view, has a second recess formed thereon that extends inward in a second direction from a side thereof, the second direction being opposite to the first direction, the second recess forming a second disposition area;
- a fourth circuit pattern having at least a part disposed in the second disposition area;
- and
- a plurality of second semiconductor chips formed on the third circuit pattern, each second semiconductor chip having
- a second positive electrode on a back surface thereof, and
- a second control electrode and a second negative electrode on a front surface thereof, the second negative electrode being electrically connected to the fourth circuit pattern by a second wiring member.
Dependencies are inferred from the claim text.