Semiconductor storage device

A semiconductor storage device comprising:

• a substrate;
• a memory cell area including a first stacked body in which a plurality of electrically conductive layers and a plurality of first insulating layers are stacked alternately one on another, and a pillar portion in which a plurality of memory cells are formed together with the plurality of electrically conductive layers, the pillar portion penetrating through the first stacked body;
• a peripheral circuit portion in which a peripheral circuit controlling the plurality of memory cells is arranged, the peripheral circuit portion intervening between the substrate and the memory cell area;
• a first plate-like portion that has a frame-like plan view shape and surrounds the peripheral circuit portion, the first plate-like portion being electrically conductive and connected at a lower end thereof to the substrate;
• a sidewall layer including silicon nitride and being provided on a side surface of the first plate-like portion;
• and
• a second insulating layer including silicon nitride, the second insulating layer being connected to the sidewall layer and covering above the peripheral circuit portion.