Method of forming interconnect structure

A method of forming an interconnect structure, comprising:

• forming a first conductive feature in a first dielectric layer;
• forming a via on the first conductive feature;
• forming a first barrier layer to continuously cover a top surface and a sidewall of the via, and a top surface of the first dielectric layer;
• forming a second dielectric layer on the first barrier layer;
• performing a first planarization process to remove a portion of the second dielectric layer and a portion of the first barrier layer, thereby exposing the top surface of the via;
• forming a third dielectric layer on the second dielectric layer, wherein the third dielectric layer has an opening exposing the top surface of the via;
• forming a second barrier layer on the third dielectric layer, wherein the second barrier layer covers a top surface of the first barrier layer and is connected to the first barrier layer to constitute a barrier structure;
• and
• forming a second conductive feature in the opening, wherein the via is disposed between and in direct contact with the first and second conductive features,
• wherein the barrier structure completely covers a sidewall and a portion of a bottom surface of the second conductive feature, the sidewall of the via, a portion of a top surface of the first conductive feature, and the top surface of the first dielectric layer.

A method of forming an interconnect structure, comprising:

• forming a first conductive feature in a first dielectric layer;
• forming a via on the first conductive feature, wherein the via has a bottom surface in direct contact with a first portion of a top surface of the first conductive feature;
• forming a lower barrier layer covering a sidewall of the via, a second portion of the top surface of the first conductive feature, and a top surface of the first dielectric layer;
• forming a second dielectric layer on the lower barrier layer to laterally wrap the via;
• forming a third dielectric layer on the second dielectric layer, wherein the third dielectric layer has a trench exposing the via;
• forming a blocking layer on a top surface of the via;
• forming an upper barrier layer on a region out of the blocking layer, the upper barrier layer covers a top surface of the lower barrier layer and is connected to the lower barrier layer to constitute a barrier structure;
• removing the blocking layer to expose the top surface of the via;
• and
• forming a second conductive feature in the trench, wherein the barrier structure covers a sidewall and a portion of a bottom surface of the second conductive feature, the sidewall of the via, a portion of a top surface of the first conductive feature and the top surface of the first dielectric layer, wherein the forming the second conductive feature in the trench comprises:
• forming a seed material on the upper barrier layer, wherein the seed material is in direct contact with the top surface of the via;
• forming a conductive material on the seed material to fill up the trench and extend to cover a top surface of the third dielectric layer;
• and
• performing a second planarization process to remove a portion of the conductive material, a portion of the seed material, and a portion of the upper barrier layer, thereby exposing the top surface of the third dielectric layer.