Methods for modifying photoresist profiles and tuning critical dimensions

A method for processing a substrate, comprising:

• depositing a sacrificial structure layer on the substrate, wherein the substrate is a doped or undoped silicon wafer or a sapphire;
• depositing a photoresist on the sacrificial structure layer;
• patterning the photoresist to produce a crude photoresist profile on the sacrificial structure layer;
• trimming the photoresist with a plasma to produce a refined photoresist profile covering a first portion of the sacrificial structure layer while a second portion of the sacrificial structure layer is exposed, wherein the refined photoresist profile has a line width roughness of about 10 Å to about 20 Å and a line edge roughness of about 10 Å to about 20 Å;
• etching the second portion of the sacrificial structure layer to form patterned features disposed on the substrate;
• depositing a dielectric layer on upper surfaces and side surfaces of the patterned features and on and in contact with an upper surface of the substrate, wherein trimming the photoresist and depositing the dielectric layer occur in the same processing chamber;
• anisotropically etching a portion of the dielectric layer, comprising:
• removing the dielectric layer on the upper surfaces of the patterned features;
• removing the dielectric layer on the upper surface of the substrate;
• and
• leaving at least a portion of the dielectric material on the side surfaces,
• wherein the portion of the dielectric material on the side surfaces forms sidewall spacers disposed on the upper surface of the substrate;
• and
• removing the patterned features while leaving the sidewall spacers disposed across and in contact with the upper surface of the substrate.

A method for processing a substrate, comprising:

• depositing a sacrificial structure layer on the substrate, wherein the substrate is a doped or undoped silicon wafer or a sapphire;
• depositing a photoresist on the sacrificial structure layer;
• patterning the photoresist to produce a crude photoresist profile on the sacrificial structure layer;
• trimming the photoresist with a plasma to produce a refined photoresist profile covering a first portion of the sacrificial structure layer while a second portion of the sacrificial structure layer is exposed, wherein the refined photoresist profile has a line width roughness of about 10 Å to about 20 Å and a line edge roughness of about 10 Å to about 20 Å;
• etching the second portion of the sacrificial structure layer to form patterned features disposed on the substrate;
• removing the photoresist from the patterned features;
• depositing a dielectric layer on upper surfaces and side surfaces of the patterned features and on and in contact with an upper surface of the substrate, wherein the dielectric layer comprises silicon oxide, silicon oxynitride, or silicon nitride, and wherein the dielectric layer is doped with carbon or hydrogen;
• anisotropically etching a portion of the dielectric layer, comprising:
• removing the dielectric layer on the upper surfaces of the patterned features;
• removing the dielectric layer on the upper surface of the substrate;
• and
• leaving at least a portion of the dielectric material on the side surfaces,
• wherein the portion of the dielectric material on the side surfaces forms sidewall spacers disposed on the upper surface of the substrate;
• and
• removing the patterned features while leaving the sidewall spacers disposed across and in contact with the upper surface of the substrate.