Write and read common leveling for 4-bit wide drams
AssigneeMarvell Asia Pte Ltd
InventorDavid Da Wei Lin
Life of this patent
Estimating the term…
Abstract
Systems and methods of write deskew training for ×4 mode memory control interface configurations. Write leveling logic in the memory controller is adjusted to obtain a write leveling setting for delaying both first and second strobe signals associated with a byte. The adjustment is based on feedback of first set of bits of a byte and irrespective of the feedback of the second set of bits of the byte. The write leveling logic is then anchored at the write leveling setting, and a deskew delay line for the second strobe signal is adjusted to obtain a first deskew setting based on the feedback of the second set of bits. Thus, in write operations, the write leveling setting can be common within the byte even the two strobe signals are transmitted to or received from two different memory storage devices.
Claims20
A system, comprising:
- interface logic that, in a first configuration, is operable to receive a first strobe signal transmitted from a first set of data lines of a byte and operable to receive a second strobe signal transmitted from a second set of data lines of said byte;
- and
- read deskew training logic coupled to said interface logic and operable to:
- align said second strobe signal with said first strobe signal to obtain a first deskew setting of a first delay line coupled to said interface logic, by adjusting said first delay line;
- align data signals from said first set of data lines with said first strobe signal to obtain second deskew settings for second delay lines coupled to said interface logic;
- and
- align data signals from said second set of data lines with said second strobe signal to obtain third deskew settings for third delay lines coupled to said first set of data lines.
A method, comprising:
- receiving a first strobe signal associated with a first set of data lines of a byte;
- receiving a second strobe signal associated with a second set of data lines of said byte;
- aligning said second strobe signal with said first strobe signal to obtain a first deskew setting for a first variable delay line;
- aligning data signals from said first set of data lines with said first strobe signal to obtain second deskew settings for a second variable delay line;
- and
- aligning data signals from said second set of data lines with said second strobe signal to obtain third deskew settings for third variable delay lines and fourth variable delay lines.
Dependencies are inferred from the claim text.