Predicting and compensating for degradation of memory cells
AssigneeMicron Technology, Inc.
InventorsZhongyuan Lu, Robert J. Gleixner
Life of this patent
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Abstract
The present disclosure includes apparatuses, methods, and systems for predicting and compensating for degradation of memory cells. An embodiment includes a memory having a group of memory cells, and circuitry configured to, upon a quantity of sense operations performed on the group of memory cells meeting or exceeding a threshold quantity, perform a sense operation on the group of memory cells using a positive sensing voltage and perform a sense operation on the group of memory cells using a negative sensing voltage, and perform an operation to program the memory cells of the group determined to be in a reset data state by both of the sense operations to the reset data state.
Claims23
An apparatus, comprising:
- a memory having a group of memory cells;
- and
- circuitry configured to, upon a quantity of sense operations performed on the group of memory cells meeting or exceeding a threshold quantity:
- perform a sense operation on the group of memory cells using a positive sensing voltage and perform a sense operation on the group of memory cells using a negative sensing voltage;
- and
- perform an operation to program the memory cells of the group determined to be in a reset data state by both of the sense operations to the reset data state.
A method of operating memory, comprising:
- determining a quantity of sense operations performed on a group of memory cells has met or exceeded a threshold quantity;
- and
- performing, upon determining the quantity of sense operations has met or exceeded the threshold quantity:
- a sense operation on the group of memory cells using a positive sensing voltage to determine a data state of each of the memory cells;
- a sense operation on the group of memory cells using a negative sensing voltage to determine a data state of each of the memory cells;
- and
- an operation to program the memory cells of the group determined to be in a reset data state by both of the sense operations to the reset data state.
An apparatus, comprising:
- a memory having a group of memory cells;
- and
- circuitry configured to, upon a quantity of sense operations performed on the group of memory cells meeting or exceeding a threshold quantity:
- perform a sense operation on the group of memory cells using a positive sensing voltage whose magnitude has been adjusted from a magnitude of a positive sensing voltage used to determine a data state of the memory cells of the group during the quantity of sense operations performed on the group;
- perform a sense operation on the group of memory cells using a negative sensing voltage;
- and
- perform an operation to program the memory cells of the group determined to be in a reset data state by both of the sense operations to the reset data state.
A method of operating memory, comprising:
- determining a quantity of sense operations performed on a group of memory cells has met or exceeded a threshold quantity;
- and
- performing, upon determining the quantity of sense operations has met or exceeded the threshold quantity:
- a sense operation on the group of memory cells using a positive sensing voltage to determine a data state of each of the memory cells;
- a sense operation on the group of memory cells using a negative sensing voltage to determine a data state of each of the memory cells;
- and
- an operation to program the memory cells of the group determined to be in a reset data state by both of the sense operations to the reset data state, wherein the operation includes applying a reset voltage pulse to the memory cells of the group determined to be in the reset data state by both of the sense operations.
Dependencies are inferred from the claim text.