Enhanced durability for systems on chip (SOCs)
AssigneeAdvanced Micro Devices, Inc.
InventorsAlexander J. Branover, Kevin M. Lepak, William A. Moyes
Life of this patent
Estimating the term…
Abstract
A system-on-chip with runtime global push to persistence includes a data processor having a cache, an external memory interface, and a microsequencer. The external memory interface is coupled to the cache and is adapted to be coupled to an external memory. The cache provides data to the external memory interface for storage in the external memory. The microsequencer is coupled to the data processor. In response to a trigger signal, the microsequencer causes the cache to flush the data by sending the data to the external memory interface for transmission to the external memory.
Claims29
A system-on-chip with runtime global push to persistence, comprising:
- a data processor having a cache;
- an external memory interface coupled to said cache and adapted to be coupled to an external memory;
- wherein said cache provides data to said external memory interface for storage in the external memory;
- and
- a microsequencer coupled to said data processor, wherein in response to a trigger signal, said microsequencer causes said cache to flush said data by sending said data to said external memory interface for transmission to the external memory, wherein:
- said data processor is coupled to said external memory interface through a data fabric, said data fabric comprising at least one buffer that temporarily stores write requests to the external memory through said external memory interface;
- and
- said data fabric is further coupled to said microsequencer, and in response to said trigger signal, said microsequencer further causes said data fabric to flush data associated with said write requests stored in said at least one buffer by sending said data to said external memory interface for transmission to the external memory.
A system-on-chip with runtime global push to persistence, comprising:
- a data processor having a cache;
- an external memory interface coupled to said cache and adapted to be coupled to an external memory;
- wherein said cache provides data to said external memory interface for storage in the external memory;
- and
- a microsequencer coupled to said data processor, wherein in response to a trigger signal, said microsequencer causes said cache to flush said data by sending said data to said external memory interface for transmission to the external memory, wherein:
- said trigger signal comprises one of a terminal event trigger signal and a non-terminal event trigger signal;
- in response to said terminal event trigger signal, said microsequencer stalls said data processor before sending said data to said external memory interface for transmission to the external memory;
- and
- in response to said non-terminal event trigger signal, said microsequencer sends said data to said external memory interface for transmission to the external memory without stalling said data processor.
A data processing system with runtime global push to persistence, comprising:
- a system-on-chip;
- and
- an external memory coupled to said system-on-chip,
- wherein said system-on-chip comprises:
- a data processor having a cache, wherein the data processor selectively modifies data in said cache in response to executing instructions;
- an external memory interface coupled to said cache and to said external memory;
- wherein said cache selectively provides modified data to said external memory interface for storage in the external memory;
- and
- a microsequencer coupled to said data processor, wherein in response to a trigger signal, said microsequencer causes said data processor to stall an execution of instructions and subsequently to flush said modified data from said cache by sending said modified data to said external memory interface for transmission to said external memory, wherein:
- said data processor is coupled to said external memory interface through a data fabric, said data fabric comprising at least one buffer that temporarily stores requests to send said modified data to said external memory interface for transmission to the external memory;
- and
- said data fabric is further coupled to said microsequencer, and in response to said trigger signal, said microsequencer further causes said data fabric to flush said modified data associated with requests stored in said at least one buffer by sending said modified data to said external memory interface for transmission to the external memory.
A data processing system with runtime global push to persistence, comprising:
- a system-on-chip;
- and
- an external memory coupled to said system-on-chip,
- wherein said system-on-chip comprises:
- a data processor having a cache, wherein the data processor selectively modifies data in said cache in response to executing instructions;
- an external memory interface coupled to said cache and to said external memory;
- wherein said cache selectively provides modified data to said external memory interface for storage in the external memory;
- and
- a microsequencer coupled to said data processor, wherein in response to a trigger signal, said microsequencer causes said data processor to stall an execution of instructions and subsequently to flush said modified data from said cache by sending said modified data to said external memory interface for transmission to said external memory, wherein:
- said trigger signal comprises one of a terminal event trigger signal and a non-terminal event trigger signal;
- in response to said terminal event trigger signal, said microsequencer stalls said data processor before sending said modified data to said external memory interface for transmission to the external memory;
- and
- in response to said non-terminal event trigger signal, said microsequencer sends said modified data to said external memory interface for transmission to the external memory without stalling said data processor.
A method for providing runtime global push to persistence in a system-on-chip comprising a data processor having a cache coupled to an external memory interface over a data fabric, comprising:
- receiving a trigger signal, and in response to receiving said trigger signal:
- stalling the data processor;
- flushing dirty data from the cache by sending corresponding first write requests to the data fabric;
- flushing all pending write requests from the data fabric by sending said pending write requests to an external persistent memory;
- and
- providing a handshake between the data processor and said external persistent memory, thereby establishing the runtime global push to persistence.
A system-on-chip with runtime global push to persistence, comprising:
- a plurality of data processors each having a cache;
- an external memory interface coupled to said cache and adapted to be coupled to an external memory;
- wherein said cache of each of said plurality of data processors provides respective dirty data to said external memory interface for storage in the external memory;
- and
- a microsequencer coupled to each of said data processors, wherein in response to a trigger signal, said microsequencer causes said cache in each of said plurality of data processors to flush said respective dirty data by sending said respective dirty data to said external memory interface for transmission to said external memory.
Dependencies are inferred from the claim text.