Memory system

A memory system comprising:

• a main memory suitable for reading, in a first address wrapping mode, all data of a faulty memory region including a faulty memory cell among a plurality of unit memory regions, as backup data based on a specific address of the faulty memory cell and writing, in a second address wrapping mode, the backup data as restoration data to a redundancy memory region based on the specific address;
• and
• a controller suitable for providing the main memory with the specific address in the first and second wrapping modes,
• wherein the main memory first selects the faulty memory cell based on the specific address, and sequentially selects other memory cells within the faulty memory region by automatically increasing or decreasing an address value starting from the specific address, in the first address wrapping mode, and
• wherein the main memory first selects a redundancy memory cell corresponding to the faulty memory cell within the redundancy memory region based on the specific address, and sequentially selects other redundancy memory cells within the redundancy memory region by automatically increasing or decreasing an address value from the specific address, in the second address wrapping mode.

An operating method of a memory system, the operating method comprising:

• selecting, in a first address wrapping mode, a faulty memory cell among a plurality of memory cells in a faulty memory region where a fault has occurred, among a plurality of unit memory regions, based on the column address, and sequentially selecting the other memory cells of the plurality of memory cells by automatically increasing/decreasing the column address in response to an address increase/decrease control signal;
• selecting, in a second address wrapping mode, a redundancy memory cell corresponding to the faulty memory cell among a plurality of redundancy memory cells in a redundancy memory region, based on the column address, and sequentially selecting the other redundancy memory cells of the plurality of redundancy memory cells by automatically increasing/decreasing the column address in response to the address increase/decrease control signal;
• reading all data of the plurality of memory cells in the faulty memory region as backup data;
• replacing the faulty memory region with the redundancy memory region;
• and
• writing the backup data as restoration data to the plurality of redundancy memory cells in the redundancy memory region.

A memory system comprising:

• a temporary memory;
• and
• a main memory which includes:
• a cell array including a normal memory region and a redundancy memory region;
• an address wrapper configured to generate an address increase/decrease control signal;
• decoding circuitry;
• and
• a data input/output circuit,
• wherein:
• in a first address wrapping mode,
• the decoding circuitry sequentially selects faulty memory cells where a fault has occurred, in the normal memory region, the faulty memory cells including a particular faulty memory cell and the other faulty memory cells, the particular faulty memory cell being selected based on a column address and a row address, and the other faulty memory cells being selected based on the column address and the address increase/decrease control signal, and
• the data input/output circuit reads data from the faulty memory cells, and outputs the read data as backup data to the temporary memory, and
• in a second address wrapping mode,
• the decoding circuitry sequentially selects redundancy memory cells in the redundancy memory region, the redundancy memory cells including a particular redundancy memory cell and the other redundancy memory cells, the particular redundancy memory cell being selected based on the column address and the row address, and the other redundancy memory cells being selected based on the column address and the address increase/decrease control signal, and
• the data input/output circuit inputs the backup data from the temporary memory, and stores the backup data as restoration data to the redundancy memory cells.

A method for operating a memory system including a cell array including a normal memory region and a redundancy memory region, the method comprising:

• in a first address wrapping mode,
• sequentially selecting faulty memory cells where a fault has occurred, in the normal memory region, the faulty memory cells including a particular faulty memory cell and the other faulty memory cells, the particular faulty memory cell being selected based on a column address and a row address, and the other faulty memory cells being selected based on the column address and an address increase/decrease control signal,
• reading data from the faulty memory cells, and
• outputting the read data as backup data to a temporary memory;
• and
• in a second address wrapping mode,
• sequentially selecting redundancy memory cells in the redundancy memory region, the redundancy memory cells including a particular redundancy memory cell and the other redundancy memory cells, the particular redundancy memory cell being selected based on the column address and the row address, and the other redundancy memory cells being selected based on the column address and the address increase/decrease control signal,
• inputting the backup data from the temporary memory, and
• storing the backup data as restoration data to the redundancy memory cells.