US 11,455,209 B2Granted

Memory system

AssigneeKioxia Corporation

InventorsTakahiro Kubota, Daiki Watanabe, Hironori Uchikawa

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Abstract

A memory system includes a non-volatile memory configured to store an N-dimensional error correction code and a memory controller. The memory controller is configured to calculate an ath soft-input value for an ath component code based on correction information of the ath component code (1≤a≤ni) of an ith dimension (1≤i≤N), ath reliability information, and a syndrome value of the ath component code, to calculate a decoded word of the ath component code, the ath correction information, and the ath reliability information by inputting the ath soft-input value and executing a decoding process of the ath component code, to store the ath correction information and bth correction information indicating a corrected position of a bth component code (1≤b≤nj) of a jth dimension (j≠i, 1≤j≤N) in a correction information memory, to store the ath reliability information in a reliability information memory, and to output an output decoded word calculated from the read information and the reliability information of each component code.

Claims20

Dependent claims

A memory system comprising:

a non-volatile memory configured to store an N-dimensional error correction code, wherein in the N-dimensional error correction code at least one symbol among symbols constituting the code is protected by N component code groups (N being an integer of 2 or more);
a read information memory configured to store read information read from the non-volatile memory;
a syndrome value memory configured to store a syndrome value of each of M component codes (1≤i≤N, ni being a number of component codes included in the component code group of an ith dimension, and M being a sum of ni) calculated from the read information;
a correction information memory configured to store ath correction information indicating at least a position corrected by each decoding process of an ath component code for each ath component code of the ith dimension (1≤a≤ni);
a reliability information memory configured to store ath reliability information indicating reliability of a decoded word obtained in the decoding process of the ath component code;
and
a memory controller configured to:
calculate an ath soft-input value for the ath component code based on the ath correction information, the ath reliability information, and the syndrome value of the ath component code;
calculate a decoded word of the ath component code, the ath correction information, and the ath reliability information by inputting the ath soft-input value and executing the decoding process of the ath component code;
store the calculated ath correction information and bth correction information indicating a corrected position of a bth component code ((1≤b≤nj) of a jth dimension (j≠i, 1≤j≤N) corrected by the decoding process of the ath component code in the correction information memory;
store the calculated ath reliability information in the reliability information memory;
and output an output decoded word calculated from the read information, the correction information, and M pieces of the ath reliability information.

9 more elements

A method of operating a memory system, the memory system having:

a non-volatile memory configured to store an N-dimensional error correction code, wherein in the N-dimensional error correction code at least one symbol among symbols constituting the code is protected by N component code groups (N being an integer of 2 or more);
a read information memory configured to store read information read from the non-volatile memory;
a syndrome value memory configured to store a syndrome value of each of M component codes (1≤i≤N, ni being a number of component codes included in the component code group of an ith dimension, and M being a sum of ni) calculated from the read information;
a correction information memory configured to store ath correction information indicating at least a position corrected by each decoding process of an ath component code for each ath component code of the ith dimension (1≤a≤ni);
and a reliability information memory configured to store ath reliability information indicating reliability of a decoded word obtained in the decoding process of the ath component code, the method comprising:
calculating an ath soft-input value for the ath component code based on the ath correction information, the ath reliability information, and the syndrome value of the ath component code;
calculating a decoded word of the ath component code, the ath correction information, and the ath reliability information by inputting the ath soft-input value and executing the decoding process of the ath component code;
storing the calculated ath correction information and bth correction information indicating a corrected position of a bth component code ((1≤b≤nj) of a jth dimension (j≠i, 1≤j≤N) corrected by the decoding process of the ath component code in the correction information memory;
storing the calculated ath reliability information in the reliability information memory;
and
outputting an output decoded word calculated from the read information, the correction information, and M pieces of the ath reliability information.

8 more elements

Dependencies are inferred from the claim text.