Controller and memory system having the same

A memory system comprising:

• first and second dies coupled to the same channel;
• a processor configured to output a first command or a second command having a higher priority than that of the first command, in response to a request received from a host;
• and
• a flash interface layer configured to output data to the first die in response to the first command,
• wherein the flash interface layer:
• divides input data into a plurality of data groups;
• when the second command is input, outputs preceding data and currently output data in a current data group and then outputs the second command to the second die;
• and
• when execution of the second command ends, outputs, to the first die, data in a next data group of the current data group that has been completely output.

A memory system comprising:

• first and second dies;
• and
• a controller including:
• a processor suitable for receiving a request from a host, and generating a first command for a first die and a second command for a second die, the second command having a higher priority than that of the first command, in response to the request;
• and
• a flash interface layer coupled to the first and second dies through a channel, and suitable for receiving a plurality of data groups corresponding to the first command, each of the plurality of data groups including plural data items,
• providing some data groups among the plurality of data groups to the first die,
• suspending providing remaining data groups among the plurality of data groups to the first die when the second command is received, and
• providing the remaining data groups to the first die when the second command is executed.