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US 11,455,002 B1Granted
Timing signal synchronisation
AssigneeCirrus Logic, Inc.
InventorsNeil Whyte, Andy Brewster, Angus Black
Life of this patent
Estimating the term…
Abstract
A device comprising: a data interface comprising: a data input for receiving a data signal; a clock input for receiving a clock signal for clocking the data signal; and a timing input for receiving a first timing signal having a first frequency; and a timing signal generator configured to generate, based on the first timing signal and the data signal, a second timing signal having a second frequency, the first frequency being a integer multiple of the second frequency, a phase of the second timing signal being aligned with an event in the data signal.
Claims21
A device comprising:
- a data interface comprising:
- a data input for receiving a data signal;
- a clock input for receiving a clock signal for clocking the data signal;
- and
- a timing input for receiving a first timing signal having a first frequency;
- and
- a timing signal generator configured to generate, based on the first timing signal and the data signal, a second timing signal having a second frequency, the first frequency being a integer multiple of the second frequency, a phase of the second timing signal being aligned with an event in the data signal.
4 more elements
A method, comprising:
- receiving a first timing signal having a first frequency;
- receiving a data signal;
- receiving a clock signal for clocking the data signal;
- and
- generating, based on the first timing signal and the data signal, a second timing signal having a second frequency, wherein the first timing frequency is a integer multiple of the second frequency, and wherein a phase of the second timing signal is aligned with an event in the data signal.
2 more elements
Dependencies are inferred from the claim text.