# US 11,452,211 B2 · Embedded circuit board and method of manufacturing same

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- Number: US 11,452,211 B2
- Document ID: US11452211B2
- Status: Granted
- Kind: B2
- Application number: 17/134,220
- Filed: 2020-12-25
- Published: 2022-01-13
- Granted: 2022-09-20
- Earliest claimed: 2020-07-07
- Assignees: Shennan Circuits Co., Ltd.
- Applicants: Shennan Circuits Co., Ltd.
- Inventors: Lixiang Huang; Zedong Wang; Hua Miao
- Web page: https://patentgrep.com/patent/US11452211B2

## CPC

- H05K 1/188: {manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component}
- H05K 3/4638: {Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits}
- H01F 27/24: Magnetic cores
- H01F 27/28: Coils; Windings; Conductive connections
- H01F 41/00: Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H05K 1/02: Details
- H05K 1/0269: {for visual or optical inspection}
- H05K 1/03: Use of materials for the substrate
- H05K 1/09: Use of materials for the {conductive, e.g. } metallic pattern
- H05K 1/11: Printed elements for providing electric connections to or between printed circuits
- H05K 1/18: structurally associated with non-printed electric components (H05K1/16 takes precedence)
- H05K 1/185: associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
- H05K 1/186: {manufactured by mounting on or connecting to patterned circuits before or during embedding}
- H05K 3/00: Apparatus or processes for manufacturing printed circuits
- H05K 3/0044: {Mechanical working of the substrate, e.g. drilling or punching (H05K3/0008 takes precedence)}
- H05K 3/027: {the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles}
- H05K 3/22: Secondary treatment of printed circuits {(H05K3/1283 takes precedence; embedding circuits in grooves by pressure H05K3/107)}
- H05K 3/28: Applying non-metallic protective coatings {(H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673)}
- H05K 3/30: Assembling printed circuits with electric components, e.g. with resistors
- H05K 3/32: electrically connecting electric components or wires to printed circuits
- H05K 3/40: Forming printed elements for providing electric connections to or between printed circuits
- H05K 3/42: Plated through-holes {or plated via connections}
- H05K 3/46: Manufacturing multilayer circuits
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 70/6875: {being on a metallic substrate, e.g. insulated metal substrates [IMS]}
- H10W 74/01: Manufacture or treatment
- H10W 74/10: characterised by their shape or disposition
- H10W 90/00: Package configurations
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)}
- H05K 3/06: the conductive material being removed chemically or electrolytically, e.g. by photo-etch process {(semi-additive methods H05K3/108)}
- H05K 3/4602: {characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated}
- H05K 2201/0195: Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
- H05K 2201/0317: Thin film conductor layer; Thin film passive component
- H05K 2201/0338: Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
- H05K 2201/09936: Marks, inscriptions, etc. for information
- H05K 2201/1003: Non-printed inductor
- H05K 2201/10636: Leadless chip, e.g. chip capacitor or resistor
- H05K 2203/0191: Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
- H05K 2203/065: Binding insulating layers without adhesive, e.g. by local heating or welding, before lamination of the whole PCB
- H05K 2203/167: Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
- H10W 70/635: {Through-vias}
- H10W 70/685: comprising multiple insulating layers
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

The invention, which relates to the technical field of inductance embedding, specifically discloses an embedded circuit board. The embedded circuit board includes: at least layer of sub-body, where preset positions of the sub-bodies are provided with through slots; and an inductance element embedded within the slots and configured to be spaced apart from sidewalls of the slots. In the above manner, it is possible to make the embedded circuit board of the present application structurally compact, highly integrated, widely applicable, and safe and reliable.

## Claims

### Claim 1

An embedded circuit board, comprising:
at least one layer of sub-body, wherein through slots are provided at presets positions of the sub-bodies;
an inductance element embedded within the slot and configured to be spaced apart from sidewalls of the slots;
a first circuit layer arranged with conductive columns;
a second circuit layer, the first circuit layer and the second circuit layer being provided to cover two opposite sides of the slot respectively such that the inductance element is located between the first circuit laver and the second circuit layer, and
inductance frames, enclosing an exterior of the inductance element;
wherein the induction element is connected to the first circuit layer via the inductance frames and the conductive columns connected to the inductance frames, the inductance element is connected to the conductive columns via ends of the inductance frames adjacent to the second circuit layer to realize electrical connection to the second circuit layer; and
the inductance frames are configured to assist the inductance element in maintaining an upright state when the sub-bodies are provided to sleeve the inductor element by means of the slots, such that the inductance element always maintains a preset distance from the sidewalls of the slots.

### Claim 2 (depends on 1)

The embedded circuit board according to claim 1, wherein:
the number of sub-bodies is greater than or equal to 2; and
wherein a fusible dielectric layer is provided between two adjacent layers of sub-bodies thereof, and the at least two layers of sub-bodies are formed by laminating and compressing the fusible dielectric layers, after sleeving the induction element by means of the slots, at least a part of the fusible dielectric layers flowing into space between the inductance element and the sidewalls of the slots and contacting the inductance element.

### Claim 3 (depends on 2)

The embedded circuit board according to claim 2, wherein:
a thickness of the fusible dielectric layer is 40 to 300 um; and
wherein the sub-bodies are copper-free core layers with a thickness of 200 to 500 um.

### Claim 4 (depends on 3)

The embedded circuit board according to claim 3,
wherein the inductance element has connection terminals electrically connected to at least one of the first circuit layer and the second circuit layer.

### Claim 5 (depends on 4)

The embedded circuit board according to claim 4, wherein at least one of the first circuit layer and the second circuit layer is provided with laser through-holes provided with conductive columns; and
wherein the connection terminals of the inductance element are connected to the at least one of the first circuit layer and the second circuit layer via the conductive columns.

### Claim 6 (depends on 4)

The embedded circuit board according to claim 4, wherein:
corresponding positions of the sub-bodies and the fusible dielectric layer are each provided with conductive holes for interlayer connection;
wherein positions of the first circuit layer and the second circuit layer corresponding to the conductive holes are provided with conductive blind holes; and
wherein the connection terminals of the inductance element are electrically connected to the conductive blind holes of the second circuit layer via the conductive blind holes of the first circuit layer and the conductive holes in sequence.

### Claim 7 (depends on 4)

The embedded circuit board according to claim 4, wherein the embedded circuit board further comprises:
at least one component provided on a side of at least one of the first circuit layer and the second circuit layer away from the slot and electrically connected to the induction element via the at least one of the first circuit layer and the second circuit layer, wherein the components are at least one of chips, capacitance elements, resistance elements, and power supply means.

### Claim 8 (depends on 1)

The embedded circuit board according to claim 1, wherein:
the number of sub-bodies is greater than or equal to 2; and
wherein a first dielectric layer is provided between the two adjacent layers of sub-bodies, and a second dielectric layer is provided between the inductance element and the sidewalls of the slots, the first dielectric layer and the second dielectric layer being welded by one-time compression.

### Claim 9 (depends on 8)

The embedded circuit board according to claim 8, wherein
the at least two layers of sub-bodies are provided with identification patterns, slots of the respective layers of sub-bodies being set with the identification patterns as reference and being identically shaped and sized, wherein the slots are configured to align the respective layers of sub-bodies and to accurately sleeve the inductance element by means of the slots, before compressing all the sub-bodies.

### Claim 10 (depends on 9)

The embedded circuit board according to claim 9, wherein:
the identification patterns are further configured to position the connection terminals of the inductance element, and wherein the first layer of sub-body and the first dielectric layer adjacent to the first layer of sub-body are laser-drilled according to the identification patterns, and at least one of the first circuit layer and the second circuit layer is laser-drilled, such that laser through-holes are formed on the first layer of sub-body and the first dielectric layer adjacent to the first layer of sub-body, and laser through-holes are also formed on the at least one of the first circuit layer and the second circuit layer.

### Claim 11 (depends on 9)

The embedded circuit board according to claim 9, wherein:
materials of the identification patterns are X-ray transparent materials.

### Claim 12 (depends on 1)

The embedded circuit board according to claim 1,
wherein the distance between the inductance frames and the sidewalls of the slots is 80 to 120 um.