# US 11,451,310 B1 · RF power detector

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- Number: US 11,451,310 B1
- Document ID: US11451310B1
- Status: Granted
- Kind: B1
- Application number: 17/207,121
- Filed: 2021-03-19
- Published: 2022-09-22
- Granted: 2022-09-20
- Earliest claimed: 2021-03-19
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Peter Shah
- Web page: https://patentgrep.com/patent/US11451310B1

## CPC

- G01R 21/10: by using square-law characteristics of circuit elements, e.g. diodes, to measure power absorbed by loads of known impedance (G01R21/02 takes precedence)
- H04B 17/101: {for measurement of specific parameters of the transmitter or components thereof}
- G01R 21/00: Arrangements for measuring electric power or power factor (G01R7/12 takes precedence)
- G01R 35/005: {Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references (G01R33/0035, G01R35/002 take precedence)}
- H04B 1/04: Circuits
- H04W 24/02: Arrangements for optimising operational condition
- H03G 3/3042: {in modulators, frequency-changers, transmitters or power amplifiers}
- H04B 2001/0416: {having gain or transmission power control}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- H04B: TRANSMISSION
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)
- H03G: CONTROL OF AMPLIFICATION

## Abstract

An RF power detector controls an amplitude of a replica input signal so that a power of the replica input signal substantially equals a power of an input signal to the RF power detector. A signal generator generates the replica input signal responsive to a digital control word. A feedback circuit adjusts the digital control word responsive to a comparison of output signals from an analog power sensor.

## Claims

### Claim 1

A power detector, comprising:
an analog power sensor;
a comparator configured to compare a first power signal from the analog power sensor to a second power signal from the analog power sensor;
a signal generator configured to generate a replica input signal having an amplitude responsive to a digital control word; and
a feedback logic circuit configured to generate the digital control word responsive to an output signal from the comparator.

### Claim 2 (depends on 1)

The power detector of claim 1, further comprising:
a capacitor configured to store the first power signal as a voltage.

### Claim 3 (depends on 2)

The power detector of claim 2, further comprising:
a switch coupled between a first terminal of the capacitor and an output of the comparator, wherein a second terminal of the capacitor is coupled to ground.

### Claim 4 (depends on 1)

The power detector of claim 1, wherein the analog power sensor includes a square-law circuit element configured to square an input signal to the analog power sensor to provide a squared output signal.

### Claim 5 (depends on 4)

The power detector of claim 4, wherein the analog power sensor further includes a filter configured to filter the squared output signal to form the first power signal.

### Claim 6 (depends on 5)

The power detector of claim 5, wherein the filter is a low-pass filter.

### Claim 7 (depends on 1)

The power detector of claim 1, further comprising:
a first switch coupled between a node for an input radio frequency (RF) signal and an input to the analog power sensor; and
a second switch coupled between an output of the signal generator and the analog power sensor.

### Claim 8 (depends on 7)

The power detector of claim 7, wherein the first switch is configured to close during a first phase for a clock signal and to open for a second phase of the clock signal, and wherein the second switch is configured to close during the second phase of the clock signal and to open during the first phase of the clock signal.

### Claim 9 (depends on 1)

The power detector of claim 1, wherein the signal generator comprises:
a circuit configured to convert an oscillating signal into a converted oscillating signal, the circuit being powered by a reference voltage; and
an attenuator configured to attenuate the converted oscillating signal responsive to the digital control word to form the replica input signal.

### Claim 10 (depends on 1)

The power detector of claim 1, wherein the signal generator comprises:
an attenuator configured to attenuate a reference voltage responsive to the digital control word to form an attenuated voltage on a signal node;
a first switch coupled between the signal node and an output node for the signal generator; and
a second switch coupled between the signal node and ground.

### Claim 11 (depends on 10)

The power detector of claim 10, wherein the first switch is configured to close during a first phase of an oscillating signal and to open during a second phase of the oscillating signal, and wherein the second switch is configured to close during the second phase of the oscillating signal and to open during the first phase of the oscillating signal.

### Claim 12 (depends on 10)

The power detector of claim 10, wherein the attenuator is a resistive divider ladder having a plurality of rungs.

### Claim 13 (depends on 12)

The power detector of claim 12, wherein the resistive divider ladder includes a switch for each rung in the plurality of rungs.

### Claim 14 (depends on 12)

The power detector of claim 12, wherein the resistive divider ladder includes a plurality of sub-ladders configured to provide a range of attenuation increments for an attenuation of the reference voltage to form the attenuated voltage.

### Claim 15 (depends on 1)

The power detector of claim 1, wherein the power detector is configured to measure a power of a radio frequency (RF) signal for a transmitter.

### Claim 16 (depends on 15)

The power detector of claim 15, wherein the transmitter is a transmitter for a cellular telephone.

### Claim 17

A method of power detection, comprising:
passing a radio frequency input signal through an analog power sensor to produce a first power signal;
generating a replica input signal responsive to a digital control word;
passing the replica input signal through the analog power sensor to produce a second power signal; and
adjusting the digital control word to measure a power of the radio frequency input signal.

### Claim 18 (depends on 17)

The method of claim 17, wherein generating the replica input signal responsive to the digital word comprises attenuating a reference voltage signal to produce the replica input signal, and wherein adjusting the digital control word comprises controlling the attenuating of the reference voltage signal through at least a coarse increment of attenuation and through a fine increment of attenuation, the fine increment of attenuation being less than the coarse increment of attenuation.

### Claim 19 (depends on 17)

The method of claim 17, wherein generating the replica input signal responsive to the digital word comprises attenuating a reference voltage signal to produce the replica input signal, and wherein the attenuating of the reference voltage signal responsive to the digital control word to generate the replica input signal comprises:
attenuating the reference voltage signal responsive to the digital control word to form an attenuated voltage; and
responsive to an oscillating signal, alternating between passing the attenuated voltage and passing ground to generate the replica input signal.

### Claim 20 (depends on 19)

The method of claim 19, wherein the oscillating signal has a frequency that is lower than a frequency for the radio frequency input signal.

### Claim 21

A power detector, comprising:
an analog power sensor;
a switching network configured to pass an input signal during a first phase of a clock signal to the analog power sensor and to pass a replica input signal during a second phase of a clock signal to the analog power sensor;
a signal generator configured to form the replica input signal responsive to a digital control word; and
a feedback logic circuit configured to generate the digital control word.

### Claim 22 (depends on 21)

The power detector of claim 21, further comprising:
a store and compare circuit configured to store a first power signal from the analog power sensor during the first phase of the clock signal and configured to perform a comparison of a second power signal from the power sensor during the second phase of the clock signal to the first power signal.

### Claim 23 (depends on 22)

The power detector of claim 22, wherein the feedback logic circuit is further configured to generate the digital control word responsive to the comparison of the second power signal during the second phase of the clock signal to the first power signal.

### Claim 24 (depends on 21)

The power detector of claim 21, wherein the switching network is further configured to couple a replica analog power sensor to a node for the input signal during the second phase of the clock signal.

### Claim 25 (depends on 22)

The power detector of claim 22, further comprising a clock source for generating the clock signal.

### Claim 26 (depends on 25)

The power detector of claim 25, wherein the feedback circuit is further configured to adjust the digital control word during the second phase of the clock signal until a power of the replica input signal substantially equals a power of the input signal.

### Claim 27

A power detector, comprising:
an analog power sensor;
a signal generator configured to generate a replica input signal responsive to a digital control word;
a switching network configured to pass an input signal to the analog power sensor during a first phase of operation and to pass the replica input signal to the analog power sensor during a second phase of operation, and
an analog-to-digital converter configured to digitize a reference power signal from the analog power sensor during the second phase of operation and to digitize a first power signal from the analog power sensor during the first phase of operation.

### Claim 28 (depends on 27)

The power detector of claim 27, further comprising:
a feedback logic circuit configured to sweep the digital control word through a range of possible values during the second phase of operation.

### Claim 29 (depends on 27)

The power detector of claim 27, wherein the input signal is an RF signal for a transmitter.

### Claim 30 (depends on 27)

The power detector of claim 27, wherein the input signal is an intermediate frequency signal for a transceiver.
