# US 11,451,226 B2 · Radio frequency switch circuitry > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,451,226 B2 - Document ID: US11451226B2 - Status: Granted - Kind: B2 - Application number: 17/020,993 - Filed: 2020-09-15 - Published: 2022-03-17 - Granted: 2022-09-20 - Earliest claimed: 2020-09-15 - Assignees: Qorvo US, Inc. - Applicants: Qorvo US, Inc. - Inventors: Michael Roberg; Charles Forrest Campbell - Web page: https://patentgrep.com/patent/US11451226B2 ## CPC - H03K 17/6871: {the output circuit comprising more than one controlled field-effect transistor} - H03K 17/693: Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract Radio frequency (RF) switch circuitry is disclosed having a field-effect transistor with a drain, a source, and a gate, wherein the gate is driven by switch driver circuitry having a control terminal for receiving switch-on and switch-off signals and a driver terminal for outputting on-state and off-state voltages. The switch driver circuitry is configured to respond to the switch-on signal by generating the on-state voltage that when applied to the gate allows an RF signal to pass between the drain and the source and respond to the switch-off signal by generating the off-state voltage that when applied to the gate blocks the RF signal from passing between the drain and the source. A low-pass filter has an inductor coupled between the gate and the driver terminal, wherein a direct current (DC) path between the gate and the driver terminal has a total DC resistance of no more than 100 Ω. ## Claims ### Claim 1 Radio frequency (RF) switch circuitry comprising: a field-effect transistor (FET) having a drain, a source, and a gate; a low-pass filter comprising an inductor coupled between the gate and a drive terminal of switch driver circuitry, wherein a direct current (DC) path between the gate and the drive terminal has a total DC resistance ranging between 0.1 Q to 100 Q; and a plurality of additional FETs coupled in series drain-to-source between the source of first FET and a fixed voltage node, wherein each of the additional FETs has an additional low-pass filter coupled between gates of the additional FETs and the drive terminal. ### Claim 2 (depends on 1) The RF switch circuitry of claim 1 further comprising the switch driver circuitry, wherein the switch driver circuitry has a control input for receiving a switch-on signal and a switch-off signal and the drive terminal for outputting an on-state voltage and an off-state voltage, and is configured to respond to the switch-on signal by generating the on-state voltage that when applied to the gate allows an RF signal to pass between the drain and the source and to respond to the switch-off signal by generating the off-state voltage that when applied to the gate blocks the RF signal from passing between the drain and the source. ### Claim 3 (depends on 1) The RF switch circuitry of claim 1 wherein the inductor is configured for self-resonance at a predetermined frequency range from 10 GHz to 80 GHz. ### Claim 4 (depends on 3) The RF switch circuitry of claim 3 wherein at self-resonance an impedance magnitude of at least 5000Ω is generated in a series path between the drive terminal and the gate. ### Claim 5 (depends on 3) The RF switch circuitry of claim 3 wherein at self-resonance an impedance magnitude of at least 2500Ω is generated in a series path between the drive terminal and the gate. ### Claim 6 (depends on 1) The RF switch circuitry of claim 1 wherein a resonator capacitor is coupled in parallel with the inductor. ### Claim 7 (depends on 6) The RF switch circuitry of claim 6 wherein the resonator capacitor is a metal-insulator-metal type capacitor. ### Claim 8 (depends on 1) The RF switch circuitry of claim 1 wherein the total DC resistance in the DC path between the drive terminal and the gate ranges from 50Ω to 100Ω. ### Claim 9 (depends on 1) The RF switch circuitry of claim 1 wherein the total DC resistance in the DC path between the drive terminal and the gate ranges from 10Ω to 50Ω. ### Claim 10 (depends on 1) The RF switch circuitry of claim 1 wherein the total DC resistance in the DC path between the drive terminal and the gate ranges from 3Ω to 10Ω. ### Claim 11 (depends on 1) The RF switch circuitry of claim 1 wherein the total DC resistance in the DC path between the drive terminal and the gate ranges from 0.1Ω to 10Ω. ### Claim 12 (depends on 1) The RF switch circuitry of claim 1 wherein the inductor is coupled directly between the gate and the drive terminal. ### Claim 13 (depends on 1) The RF switch circuitry of claim 1 wherein the FET is a gallium nitride (GaN) FET. ### Claim 14 (depends on 13) The RF switch circuitry of claim 13 wherein the GaN FET is fabricated from GaN-on-silicon-on-insulator (GaN-SOI) technology. ### Claim 15 (depends on 1) The RF switch circuitry of claim 1 wherein switching speed between an off-state and an on-state of the FET ranges from 50 picoseconds to 500 picoseconds. ### Claim 16 (depends on 1) The RF switch circuitry of claim 1 wherein switching time between an off-state and an on-state of FET ranges from 500 picoseconds to 1 nanosecond. ### Claim 17 (depends on 1) The RF switch circuitry of claim 1 wherein a drain-to-source voltage is within 0.1% of zero volts when an RF signal of at least 10 W is present on the drain and the FET is not conducting in the off-state. ### Claim 18 (depends on 1) The RF switch circuitry of claim 1 wherein a drain-to-source voltage is within 0.1% of zero volts when an RF signal of at least 10 W is passing through the FET between the drain and source when the FET is in the on-state. ### Claim 19 (depends on 1) The RF switch circuitry of claim 1 wherein leakage current of the FET is no more than 100 picoamperes during operation. ### Claim 20 (depends on 1) The RF switch circuitry of claim 1 further comprising a Q-lowering resistor coupled between the drive terminal and the inductor, wherein the Q-lowering resistor has a DC resistance range from 0.5Ω to 10Ω. ### Claim 21 (depends on 1) The RF switch circuitry of claim 1 further including a bypass capacitor coupled between the control terminal and the fixed voltage node. ### Claim 22 (depends on 21) The RF switch circuitry of claim 21 wherein the fixed voltage node is ground. ### Claim 23 (depends on 1) The RF switch circuitry of claim 1 wherein the inductor is spiral metal trace formed over a substrate. ### Claim 24 (depends on 23) The RF switch circuitry of claim 23 wherein the substrate is silicon carbide. ### Claim 25 (depends on 1) The RF switch circuitry of claim 1 wherein each of the plurality of additional FETs is a GaN FET.