# US 11,451,153 B2 · Power conversion device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,451,153 B2 - Document ID: US11451153B2 - Status: Granted - Kind: B2 - Application number: 17/284,229 - Filed: 2019-10-28 - Published: 2021-11-18 - Granted: 2022-09-20 - Earliest claimed: 2018-11-08 - Assignees: Rohm Co., Ltd. - Applicants: Rohm Co., Ltd. - Inventors: Yuji Ishimatsu; Ryuichi Furutani - Web page: https://patentgrep.com/patent/US11451153B2 ## CPC - H02M 3/33507: {with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence)} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - H02M 1/081: {wherein the phase of the control voltage is adjustable with reference to the AC source} - H02M 1/327: {against abnormal temperatures} - H02M 7/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections} - H02M 7/537: using semiconductor devices only, e.g. single switched pulse inverters - H10W 70/468: {Circuit boards} - H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00} - H10W 90/00: Package configurations - H10W 90/811: {Multiple chips on leadframes} - H10W 72/07552: {changes in structures or sizes} - H10W 72/527: {Multiple bond wires having different sizes} - H10W 72/5366: {the bond wires having kinks} - H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements} - H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements} - H10W 72/5475: {multiple bond wires connected to common bond pads at both ends of the wires} - H10W 72/884: {Die-attach connectors and bond wires} - H10W 72/944: {Dispositions of multiple bond pads} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 90/753: {between laterally-adjacent chips} - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract The power converter A1 includes a semiconductor device B1, and a substrate H on which the semiconductor device B1 is mounted, where the semiconductor device B1 includes a control chip constituting a primary control circuit, a semiconductor chip constituting a secondary power circuit, and a transmission circuit for electrically insulating the primary control circuit and the secondary power circuit and for signal transmission between the primary control circuit and the secondary power circuit. The substrate H has a conductive portion K. The power converter A1 includes a connecting terminal T1 disposed on the substrate H and electrically connected to the conductive portion K. The power converter A1 includes a conductive path D1 that is at least partially formed by the conductive portion K of the substrate H, and that electrically connects the primary control circuit and the connecting terminal T1. Such a configuration contributes to downsizing the power converter A1. ## Claims ### Claim 1 A power converter comprising: a semiconductor device that includes: a control chip constituting a primary control circuit; a semiconductor chip constituting a secondary power circuit; and a transmission circuit electrically insulating the primary control circuit and the secondary power circuit and having a signal transmission function between the primary control circuit and the secondary power circuit; a first substrate with the semiconductor device mounted thereon, the first substrate formed with a first conductive portion; a first connecting terminal disposed on the first substrate and electrically connected to the first conductive portion; and a first conductive path at least a portion of which is formed by the first conductive portion of the first substrate, the first conductive path electrically connecting the primary control circuit and the first connecting terminal. ### Claim 2 (depends on 1) The power converter according to claim 1, wherein the first substrate includes a base member having a front surface and a back surface that face opposite to each other in a thickness direction, and the first conductive portion includes a front surface portion on the front surface, a back surface portion on the back surface, and a plurality of through portions each passing through the base member and electrically connecting a portion of the front surface portion and a portion of the back surface portion. ### Claim 3 (depends on 2) The power converter according to claim 2, wherein the front surface portion includes a first front-surface wiring portion constituting the first conductive path, the back surface portion includes a first back-surface wiring portion constituting the first conductive path, and the plurality of through portions include a first through portion constituting the first conductive path. ### Claim 4 (depends on 3) The power converter according to claim 3, further comprising a first resistor connected to the first front-surface wiring portion in series and constituting the first conductive path. ### Claim 5 (depends on 4) The power converter according to claim 4, wherein the front surface portion includes a second front-surface wiring portion connected to the first front-surface wiring portion and to a ground. ### Claim 6 (depends on 5) The power converter according to claim 5, further comprising a first capacitor connected to the second front-surface wiring portion in series. ### Claim 7 (depends on 3) The power converter according to claim 3, wherein the first connecting terminal is positioned apart from the semiconductor device in a first direction, and the first front-surface wiring portion extends along the first direction. ### Claim 8 (depends on 3) The power converter according to claim 3, wherein the first back-surface wiring portion extends along the first direction. ### Claim 9 (depends on 3) The power converter according to claim 3, further comprising a plurality of first conductive paths arranged apart in a second direction perpendicular to the first direction. ### Claim 10 (depends on 5) The power converter according to claim 5, wherein the second front-surface wiring portion connects to and intersects with a plurality of first front-surface wiring portions. ### Claim 11 (depends on 3) The power converter according to claim 3, further comprising: a second connecting terminal disposed on the first substrate and electrically connected to the first conductive portion; and a second conductive path at least a part of which is formed by the first conductive portion of the first substrate, the second conductive path electrically connecting the secondary power circuit and the second connecting terminal. ### Claim 12 (depends on 11) The power converter according to claim 11, wherein the front surface portion includes a third front-surface wiring portion constituting the second conductive path, the back surface portion includes a second back-surface wiring portion constituting the second conductive path, and the plurality of through portions include a second through portion constituting the second conductive path. ### Claim 13 (depends on 12) The power converter according to claim 12, wherein a width of the third front-surface wiring portion in the second direction is larger than a width of the first front-surface wiring portion in the second direction. ### Claim 14 (depends on 1) The power converter according to claim 1, wherein the semiconductor device includes: a second substrate; a second conductive portion that is made of a conductive material formed on the second substrate; a first lead arranged on the second substrate and having a higher heat dissipation than the second substrate; the semiconductor chip being disposed on the first lead; the control chip being electrically connected to the second conductive portion and the semiconductor chip, and disposed on the second substrate so as to be spaced apart from the semiconductor chip and the first lead in plan view, the control chip being configured to control the semiconductor chip; a second lead spaced apart from the first lead and disposed on the second conductive portion so as to be electrically connected to the second conductive portion; a transmission circuit chip that includes the transmission circuit, the transmission circuit chip being electrically connected to the second conductive portion and the second lead and disposed on the second substrate so as to be spaced apart from the semiconductor chip in plan view; and a resin that covers the semiconductor chip, the control chip, and the transmission circuit chip, at least a portion of the second substrate, a portion of the first lead, and a portion of the second lead. ### Claim 15 (depends on 14) The power converter according to claim 14, wherein the transmission circuit chip is configured as a transformer including at least two separate coils facing to each other for transmitting an electrical signal. ### Claim 16 (depends on 14) The power converter according to claim 14, wherein the second substrate contains ceramic. ### Claim 17 (depends on 14) The power converter according to claim 14, wherein the second conductive portion contains silver.