Array substrate and manufacturing method thereof

A manufacturing method of an array substrate, comprising:

• depositing a buffer layer and a source-drain metal layer on a substrate in sequence, performing a first photolithography process to form a source electrode, a drain electrode, and a touch line;
• depositing a polysilicon layer, performing a second photolithography process to form a conductive channel, the conductive channel being disposed between the source electrode and the drain electrode, and contacting with the source electrode and the drain electrode;
• depositing a gate insulating layer and a pixel electrode layer in sequence, performing a third photolithography process to form a pixel electrode, forming a first via hole in the gate insulating layer above the touch line, and forming a second via hole in the gate insulating layer above the drain electrode;
• depositing a gate metal layer, performing a fourth photolithography process to form a gate electrode, a first connection electrode, and a second connection electrode, wherein the first connection electrode is connected to the touch line through the first via hole, the second connection electrode is connected to the drain electrode through the second via hole, and forming a lightly doped area and a heavily doped area in the conductive channel;
• depositing a flat layer, performing a fifth photolithography process to form a third via hole in the flat layer above the first connection electrode;
• and
• depositing a common electrode layer, performing a sixth photolithography process to form a touch electrode and a common electrode, wherein the touch electrode is connected to the first connection electrode through the third via hole;
• wherein the step of depositing the buffer layer and the source-drain metal layer on the substrate in sequence, performing the first photolithography process to form the source electrode, the drain electrode, and the touch line includes:
• depositing the buffer layer, the source-drain metal layer and the first photoresist layer on the substrate in sequence, exposing and developing the first photoresist layer by using a first mask to form a first photoresist pattern;
• etching the source-drain metal layer with the first photoresist pattern as a mask to form the source electrode, the drain electrode, and the touch line, and removing the first photoresist pattern;
• the step of depositing the polysilicon layer, performing the second photolithography process to form the conductive channel includes:
• depositing an amorphous silicon layer, and performing laser annealing on the amorphous silicon layer to form the polysilicon layer;
• depositing a second photoresist layer on the polysilicon layer, exposing and developing the second photoresist layer using a second mask to form a second photoresist pattern;
• and
• etching the polysilicon layer by using the second photoresist pattern as a mask to form the conductive channel, and removing the second photoresist pattern.