Systems and methods for semiconductor chip surface topography metrology

A system for measuring a surface topography of a semiconductor chip, comprising:

• an interferometer configured to provide a plurality of interference signals each corresponding to a respective one of a plurality of positions on a surface of the semiconductor chip;
• a scanning probe microscopy (SPM) or an electron microscopy configured to provide a plurality of calibration signals;
• and
• at least one processor configured to:
• classify the interference signals into a plurality of categories using a model, wherein each of the categories corresponds to a region having a same material on the surface of the semiconductor chip;
• determine a surface height offset between a surface baseline and at least one of the categories based, at least in part, on at least one of the calibration signals associated with the region corresponding to the at least one of the categories;
• and
• characterize the surface topography of the semiconductor chip based, at least in part, on the surface height offset and the interference signals.

A tangible computer-readable device having instructions stored thereon that, when executed by at least one computing device, causes the at least one computing device to perform operations comprising:

• receiving a plurality of interference signals each corresponding to a respective one of a plurality of positions on a surface of a semiconductor chip;
• classifying the interference signals into a plurality of categories using a model, wherein each of the categories corresponds to a region having a same material on the surface of the semiconductor chip;
• determining a surface height offset between a surface baseline and at least one of the categories based, at least in part, on a calibration signal associated with the region corresponding to the at least one of the categories;
• and
• characterizing a topography of the semiconductor chip based, at least in part, on the surface height offset and the interference signals.