# US 11,445,137 B2 · Systems and methods for reference settling > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,445,137 B2 - Document ID: US11445137B2 - Status: Granted - Kind: B2 - Application number: 16/683,977 - Filed: 2019-11-14 - Published: 2021-01-21 - Granted: 2022-09-13 - Earliest claimed: 2019-07-17 - Assignees: Semiconductor Components Industries, LLC - Applicants: Semiconductor Components Industries, LLC - Inventors: Rajashekar Benjaram - Web page: https://patentgrep.com/patent/US11445137B2 ## CPC - H03M 1/466: {using switched capacitors} - H03M 1/468: {in which the input S/H circuit is merged with the feedback DAC array} - H03M 1/66: Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) - H03M 1/68: with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - H03M 1/804: {with charge redistribution} - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION ## Abstract An imaging system may include an image sensor. The image sensor may have an array of image pixels arranged in rows and columns. Each column of image pixels may be coupled to column readout circuitry via a corresponding column line. The column readout circuitry may include analog-to-digital conversion circuitry. The analog-to-digital conversion circuitry may include split MSB and LSB capacitor banks. The MSB capacitor bank may include capacitors selectively coupled to a coarse reference voltage or a fine reference voltage. The LSB capacitor bank may include capacitors electively coupled to the coarse reference voltage. ## Claims ### Claim 1 Digital-to-analog conversion circuitry that receives an input signal, the digital-to-analog conversion circuitry comprising: a first plurality of capacitors associated with a first capacitor bank, wherein each capacitor in the first plurality of capacitors is configured to sample the input signal at a first terminal and to receive a selected one of a coarse reference voltage, a fine reference voltage, and an additional reference voltage at a second terminal, and wherein the first terminal of a given capacitor in the first plurality of capacitors is configured to receive an input voltage of the input signal using a sampling switch, and the second terminal of the given capacitor in the first plurality of capacitors is configured to selectively receive the coarse reference voltage using first and second switches and to selectively receive the fine reference voltage using the first switch and a third switch; and a second plurality of capacitors associated with a second capacitor bank, wherein each capacitor in the second plurality of capacitors is configured to sample the input signal at a first terminal and to receive a selected one of the coarse reference voltage and the additional reference voltage at a second terminal. ### Claim 2 (depends on 1) The digital-to-analog conversion circuitry defined in claim 1, wherein the additional reference voltage is a ground voltage. ### Claim 3 (depends on 1) The digital-to-analog conversion circuitry defined in claim 1, wherein the coarse reference voltage and the fine reference voltage are voltages larger than a ground voltage. ### Claim 4 (depends on 1) The digital-to-analog conversion circuitry defined in claim 1, wherein the coarse reference voltage and the fine reference voltage are generated based on a same initial reference voltage. ### Claim 5 (depends on 1) The digital-to-analog conversion circuitry defined in claim 1, wherein the second terminal of the given capacitor in the first plurality of capacitors is configured to receive the additional reference voltage using a fourth switch. ### Claim 6 (depends on 5) The digital-to-analog conversion circuitry defined in claim 5, wherein the second terminal of a given capacitor in the second plurality of capacitors is configured to receive the coarse reference voltage using a fifth switch and the second terminal of the given capacitor in the second plurality of capacitors is configured to receive the additional reference voltage using a sixth switch. ### Claim 7 (depends on 1) The digital-to-analog conversion circuitry defined in claim 1, further comprising: an additional capacitor having first and second terminals, wherein the first terminal of the additional capacitor is coupled to the first capacitor bank, and the second terminal of the additional capacitor is coupled to the second capacitor bank. ### Claim 8 (depends on 7) The digital-to-analog conversion circuitry defined in claim 7, wherein the sampling switch is coupled to the first terminal of the additional capacitor, and the first terminal of the additional capacitor is configured to provide an output voltage for the digital-to-analog conversion circuitry.