# US 11,445,051 B2 · Configurable parser and a method for parsing information units

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- Number: US 11,445,051 B2
- Document ID: US11445051B2
- Status: Granted
- Kind: B2
- Application number: 17/247,147
- Filed: 2020-12-01
- Published: 2021-03-18
- Granted: 2022-09-13
- Earliest claimed: 2013-09-16
- Assignees: Amazon Technologies, Inc.
- Applicants: Amazon Technologies, Inc.
- Inventors: Ofer Naaman; Erez Izenberg; Nafea Bshara
- Web page: https://patentgrep.com/patent/US11445051B2

## CPC

- H04L 47/2433: {Allocation of priorities to traffic types}
- G06F 16/00: Information retrieval; Database structures therefor; File system structures therefor
- G06F 16/134: {Distributed indices}
- G06F 16/182: Distributed file systems
- G06F 16/245: Query processing
- G06F 16/2471: {Distributed queries}
- G06F 16/254: {Extract, transform and load [ETL] procedures, e.g. ETL data flows in data warehouses}
- G06F 16/90: Details of database functions independent of the retrieved data types
- G06F 16/90344: {by using string matching techniques}
- H04L 45/38: {Flow based routing}
- H04L 45/74: Address processing for routing
- H04L 47/10: Flow control; Congestion control
- H04L 47/43: Assembling or disassembling of packets, e.g. segmentation and reassembly [SAR]
- H04L 49/602: {Multilayer or multiprotocol switching, e.g. IP switching}
- H04L 49/90: Buffering arrangements
- H04L 69/02: {Protocol performance}
- H04L 69/12: Protocol engines
- H04L 69/16: Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
- H04L 69/22: Parsing or analysis of headers
- G06F 9/3001: {Arithmetic instructions}
- G06F 13/385: {for adaptation of a particular data processing system to different peripheral devices}
- H04L 1/0066: {Parallel concatenated codes}
- H04L 47/125: by balancing the load, e.g. traffic engineering
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A packet processing technique can include selecting a protocol field from the packet, and performing a comparison of the selected protocol field with comparison data in a compare logic array to output a protocol index. The protocol index can be used as an address to read parsing commands from a parse control table, and a parse result can be generated based on executing the parsing commands on the packet. The parse results are used to derive a parse result vector, which can be used by a forwarding engine to forward the packet.

## Claims

### Claim 1

A packet processing method comprising:
receiving a packet;
performing a packet parsing process including:
selecting a protocol field from the packet;
performing a comparison of the selected protocol field with comparison data in a compare logic array to output a protocol index;
using the protocol index as an address to read parsing command information from a parse control table; and
generating parse result based on the parsing command information; and
storing a parse result vector based on the parse result in a completion descriptor for a forwarding engine.

### Claim 2 (depends on 1)

The method of claim 1, wherein the packet includes multiple protocols, and the packet parsing process is performed iteratively for the multiple protocols to derive the parse result vector.

### Claim 3 (depends on 2)

The method of claim 2, wherein the parsing command information includes a next protocol command indicating an offset to a location of a next protocol field in the packet to process.

### Claim 4 (depends on 1)

The method of claim 1, wherein the parse result vector includes protocol header data, and the parsing command information includes a data command indicating an offset to a location of protocol header data in the packet, and a size of the protocol header data.

### Claim 5 (depends on 4)

The method of claim 4, wherein the data command further includes a write pointer indicating an offset in the parse result vector to write the protocol header data.

### Claim 6 (depends on 1)

The method of claim 1, wherein the parsing command information includes a header length command to calculate a length of a current protocol header.

### Claim 7 (depends on 1)

The method of claim 1, wherein the parsing command information includes an end-of-parsing indicator indicating whether a current protocol header is a last header to process.

### Claim 8 (depends on 1)

The method of claim 1, wherein the parse result vector includes a level 3 (L3) protocol index value and a level 4 (L4) protocol index value.

### Claim 9 (depends on 8)

The method of claim 8, wherein the parse result vector further includes a L3 source address, a L3 destination address, a L4 source port, and a L4 destination port.

### Claim 10 (depends on 1)

The method of claim 1, wherein the packet parsing process is performed iteratively, and wherein a destination address and a source address are obtained by a first iteration of the packet parsing process, virtual local area network (VLAN) information is obtained by a second iteration of the packet parsing process, and an internet protocol (IP) header is obtained by a third iteration of the packet parsing process.

### Claim 11

An integrated circuit device comprising:
a configurable parsing engine having:
a data register operable to store a packet;
an offset selector operable to select a protocol field from the packet;
compare and command logic operable to perform a comparison of the selected protocol field with comparison data in a compare logic array to generate a protocol index, and use the protocol index as an address to read parsing command information from a parse control table; and
parser engine control logic operable to generate a parse result for a parse result vector based on the parsing command information.

### Claim 12 (depends on 11)

The integrated circuit device of claim 11, wherein the packet includes multiple protocols, and wherein the integrated circuit device includes a plurality of configurable parsing engines to process the multiple protocols of the packet.

### Claim 13 (depends on 12)

The integrated circuit device of claim 12, wherein the parsing command information includes a next protocol command indicating an offset to a location of a next protocol field in the packet to be processed by a next configurable parsing engine of the plurality of configurable parsing engines.

### Claim 14 (depends on 11)

The integrated circuit device of claim 11, wherein the parse result vector includes protocol header data, and the parsing command information includes a data command indicating an offset to a location of protocol header data in the packet, and a size of the protocol header data.

### Claim 15 (depends on 14)

The integrated circuit device of claim 14, wherein the data command further includes a write pointer indicating an offset in the parse result vector to write the protocol header data.

### Claim 16 (depends on 11)

The integrated circuit device of claim 11, wherein the parsing command information includes a header length command to calculate a length of a current protocol header.

### Claim 17 (depends on 11)

The integrated circuit device of claim 11, wherein the parsing command information includes an end-of-parsing indicator indicating whether a current protocol header is a last header to process.

### Claim 18 (depends on 11)

The integrated circuit device of claim 11, wherein the parse result vector includes a level 3 (L3) protocol index value and a level 4 (L4) protocol index value.

### Claim 19 (depends on 18)

The integrated circuit device of claim 18, wherein the parse result vector further includes a L3 source address, a L3 destination address, a L4 source port, and a L4 destination port.

### Claim 20 (depends on 11)

The integrated circuit device of claim 11, further including a forwarding engine to steer the packet to a processor based on the parse result vector.