# US 11,444,634 B2 · Time-interleaved noise-shaping successive-approximation analog-to-digital converter

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,444,634 B2
- Document ID: US11444634B2
- Status: Granted
- Kind: B2
- Application number: 17/315,571
- Filed: 2021-05-10
- Published: 2021-08-26
- Granted: 2022-09-13
- Earliest claimed: 2019-10-22
- Assignees: Mediatek Inc.
- Applicants: Mediatek Inc.
- Inventors: Chin-Yu Lin; Ying-Zu Lin; Chih-Hou Tsai; Chao-Hsin Lu
- Web page: https://patentgrep.com/patent/US11444634B2

## CPC

- H03M 1/38: sequentially only, e.g. successive approximation type (converting more than one bit per step H03M1/14)
- H03M 1/08: of noise {(H03M1/0617 takes precedence)}
- H03M 1/1215: {using time-division multiplexing}
- H03M 1/1245: {Details of sampling arrangements or methods}
- H03M 1/14: Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
- H03M 1/0854: {of quantisation noise}
- H03M 1/468: {in which the input S/H circuit is merged with the feedback DAC array}
- H03M 1/802: {using capacitors, e.g. neuron-mos transistors, charge coupled devices}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A time-interleaved noise-shaping successive-approximation analog-to-digital converter (TI NS-SAR ADC) is shown. A first successive-approximation channel has a first set of successive-approximation registers, and a first coarse comparator operative to coarsely adjust the first set of successive-approximation registers. A second successive-approximation channel has a second set of successive-approximation registers, and a second coarse comparator operative to coarsely adjust the second set of successive-approximation registers. A fine comparator is provided to finely adjust the first set of successive-approximation registers and the second set of successive-approximation registers alternately. A noise-shaping circuit is provided to sample residues of the first and second successive-approximation channels for the fine comparator to finely adjust the first and second sets of successive-approximation registers.

## Claims

### Claim 1

A time-interleaved noise-shaping successive-approximation analog-to-digital converter, comprising:
a first successive-approximation channel, having a first set of successive-approximation registers and a first coarse comparator coupled to the first set of successive-approximation registers to coarsely adjust the first set of successive-approximation registers;
a second successive-approximation channel, having a second set of successive-approximation registers and a second coarse comparator coupled to the second set of successive-approximation registers to coarsely adjust the second set of successive-approximation registers;
a fine comparator, coupled to the first set of successive-approximation registers and the second set of successive-approximation registers, to finely adjust the first set of successive-approximation registers and the second set of successive-approximation registers; and
a noise-shaping circuit, sampling residues of the first successive-approximation channel for the fine comparator to finely adjust the second set of successive-approximation registers, and sampling residues of the second successive-approximation channel for the fine comparator to finely adjust the first set of successive-approximation registers.

### Claim 2 (depends on 1)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 1, wherein:
the noise-shaping circuit performs residue sampling using back-to-back capacitors; and
the noise-shaping circuit integrates residues by charge sharing, for signal-residue summation at an input side of the fine comparator.

### Claim 3 (depends on 1)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 1, wherein:
the first coarse comparator sets the first set of successive-approximation registers in a first phase;
the fine comparator sets the first set of successive-approximation registers in a second phase; and
the first phase is prior to the second phase.

### Claim 4 (depends on 3)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 3, wherein:
the second coarse comparator sets the second set of successive-approximation registers in the second phase;
the fine comparator sets the second set of successive-approximation registers in a third phase; and
the second phase is prior to the third phase.

### Claim 5 (depends on 4)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 4, wherein:
the first coarse comparator sets the first set of successive-approximation registers in the third phase;
the fine comparator sets the first set of successive-approximation registers in a fourth phase; and
the third phase is prior to the fourth phase.

### Claim 6 (depends on 5)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 5, wherein:
the second coarse comparator sets the second set of successive-approximation registers in the fourth phase.

### Claim 7 (depends on 6)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 6, wherein:
the fine comparator sets the second set of successive-approximation registers in the first phase.

### Claim 8 (depends on 1)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 1, wherein the noise-shaping circuit further comprises:
a first integral capacitor whose top plate is coupled to a positive input terminal of the fine comparator; and
a second integral capacitor whose top plate is coupled to a negative input terminal of the fine comparator,
wherein the first integral capacitor and the second integral capacitor are provided for integration of residues sampled from the first successive-approximation channel and the second successive-approximation channel.

### Claim 9 (depends on 8)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 8, wherein
the first successive-approximation channel further has a first capacitive digital-to-analog converter operated according to the first set of successive-approximation registers, wherein the first capacitive digital-to-analog converter has a first capacitor network whose top plate is coupled to a positive input terminal of the first coarse comparator and a second capacitor network whose top plate is coupled to a negative input terminal of the first coarse comparator;
the second successive-approximation channel further has a second capacitive digital-to-analog converter operated according to the second set of successive-approximation registers, wherein the second capacitive digital-to-analog converter has a third capacitor network whose top plate is coupled to a positive input terminal of the second coarse comparator and a fourth capacitor network whose top plate is coupled to a negative input terminal of the second coarse comparator;
in an input sampling phase of the first successive-approximation channel, an input signal of the time-interleaved noise-shaping successive-approximation analog-to-digital converter is sampled between the top plate of the first capacitor network and the top plate of the second capacitor network; and
in an input sampling phase of the second successive-approximation channel, the input signal of the time-interleaved noise-shaping successive-approximation analog-to-digital converter is sampled between the top plate of the third capacitor network and the top plate of the fourth capacitor network.

### Claim 10 (depends on 9)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 9, wherein the noise-shaping circuit further comprises a first capacitor and a second capacitor, wherein:
in a first phase and a second phase, the top plate of the first capacitor network is coupled to a top plate of the first capacitor and a bottom plate of the second capacitor, and the top plate of the second capacitor network is coupled to a bottom plate of the first capacitor and a top plate of the second capacitor;
in a third phase, the first capacitor and the first integral capacitor are coupled in parallel between the positive input terminal of the fine comparator and the top plate of the third capacitor network, and the second capacitor and the second integral capacitor are coupled in parallel between the negative input terminal of the fine comparator and the top plate of the fourth capacitor network; and
the first phase is prior to the second phase, and the second phase is prior to the third phase.

### Claim 11 (depends on 10)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 10, wherein the noise-shaping circuit further comprises a third capacitor and a fourth capacitor, wherein:
in the second phase and the third phase, the top plate of the third capacitor network is coupled to a top plate of the third capacitor and a bottom plate of the fourth capacitor, and the top plate of the fourth capacitor network is coupled to a bottom plate of the third capacitor and a top plate of the fourth capacitor;
in a fourth phase, the third capacitor and the first integral capacitor are coupled in parallel between the positive input terminal of the fine comparator and the top plate of the first capacitor network, and the fourth capacitor and the second integral capacitor are coupled in parallel between the negative input terminal of the fine comparator and the top plate of the second capacitor network; and
the third phase is prior to the fourth phase.

### Claim 12 (depends on 11)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 11, wherein the noise-shaping circuit further comprises a fifth capacitor and a sixth capacitor, wherein:
in the first phase, the fifth capacitor and the first integral capacitor are coupled in parallel between the positive input terminal of the fine comparator and the top plate of the third capacitor network, and the sixth capacitor and the second integral capacitor are coupled in parallel between the negative input terminal of the fine comparator and the top plate of the fourth capacitor network.

### Claim 13 (depends on 12)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 12, wherein the noise-shaping circuit further comprises a seventh capacitor and an eighth capacitor, wherein:
in the second phase, the seventh capacitor and the first integral capacitor are coupled in parallel between the positive input terminal of the fine comparator and the top plate of the first capacitor network, and the eighth capacitor and the second integral capacitor are coupled in parallel between the negative input terminal of the fine comparator and the top plate of the second capacitor network.

### Claim 14 (depends on 13)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 13, wherein:
in the third phase and the fourth phase, the top plate of the first capacitor network is coupled to a top plate of the fifth capacitor and a bottom plate of the sixth capacitor, and the top plate of the second capacitor network is coupled to a bottom plate of the fifth capacitor and a top plate of the sixth capacitor.

### Claim 15 (depends on 14)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 14, wherein:
in the first phase and the fourth phase, the top plate of the third capacitor network is coupled to a top plate of the seventh capacitor and a bottom plate of the eighth capacitor, and the top plate of the fourth capacitor network is coupled to a bottom plate of the seventh capacitor and a top plate of the eighth capacitor.

### Claim 16 (depends on 15)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 15, wherein:
the first coarse comparator sets the first set of successive-approximation registers in the first phase; and
the fine comparator sets the first set of successive-approximation registers in the second phase.

### Claim 17 (depends on 16)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 16, wherein:
the second coarse comparator sets the second set of successive-approximation registers in the second phase; and
the fine comparator sets the second set of successive-approximation registers in the third phase.

### Claim 18 (depends on 17)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 17, wherein:
the first coarse comparator sets the first set of successive-approximation registers in the third phase; and
the fine comparator sets the first set of successive-approximation registers in the fourth phase.

### Claim 19 (depends on 18)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 18, wherein:
the second coarse comparator sets the second set of successive-approximation registers in the fourth phase.

### Claim 20 (depends on 19)

The time-interleaved noise-shaping successive-approximation analog-to-digital converter as claimed in claim 19, wherein:
the fine comparator sets the second set of successive-approximation registers in the first phase.