# US 11,444,210 B2 · On-chip power supply noise suppression through hyperabrupt junction varactors

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- Number: US 11,444,210 B2
- Document ID: US11444210B2
- Status: Granted
- Kind: B2
- Application number: 16/448,019
- Filed: 2019-06-21
- Published: 2019-12-26
- Granted: 2022-09-13
- Earliest claimed: 2018-06-21
- Assignees: Drexel University
- Applicants: Drexel University
- Inventors: Divya Pathak; Ioannis Savidis
- Web page: https://patentgrep.com/patent/US11444210B2

## CPC

- H10D 1/64: Variable-capacitance diodes, e.g. varactors
- H10D 1/20: Inductors
- H10D 1/68: Capacitors having no potential barriers
- H10D 84/204: {of combinations of diodes or capacitors or resistors}
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 72/00: Interconnections or connectors in packages
- H10W 44/243: {for decoupling, e.g. bypass capacitors}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

The increasing power density and, therefore, current consumption of high performance integrated circuits (ICs) results in increased challenges in the design of a reliable and efficient on-chip power delivery network. In particular, meeting the stringent on-chip impedance of the IC requires circuit and system techniques to mitigate high frequency noise that results due to resonance between the package inductance and the onchip capacitance. In this paper, a novel circuit technique is proposed to suppress high frequency noise through the use of a hyperabrupt junction tuning varactor diode as a decoupling capacitor for noise critical functional blocks. With the proposed circuit technique, the voltage droops and overshoots on the onchip power distribution network are suppressed by up to 60% as compared to MIM or deep trench decoupling capacitors of the same capacitance. In addition, there is no added latency to react to power supply noise and there is no degradation to circuit performance as compared to existing techniques in commercial products and literature.

## Claims

### Claim 1

A hyperabrupt varactor diode comprising:
an anode;
a diode and a capacitor connected in parallel to the anode, wherein the diode includes a variable-series resistor in series with a variable conjunction capacitor; and
a cathode connected to the parallel-connected diode and capacitor; and
an inductor in series between the anode and the parallel connected diode and capacitor.

### Claim 2 (depends on 1)

The hyperabrupt varactor diode of claim 1, wherein the inductor and capacitor form an on-chip interconnector.

### Claim 3 (depends on 1)

The hyperabrupt varactor diode of claim 1, comprising a P-N junction with a heavily doped P side.

### Claim 4 (depends on 1)

The hyperabrupt varactor diode of claim 1, wherein variation of a doping concentration on an N side of the P-N junction sets the feasible capacitance range of the varactor as a function of reverse bias voltage.

### Claim 5 (depends on 4)

The hyperabrupt varactor diode of claim 4, wherein the doping concentration on the N side is mathematically expressed as Nd α x{circumflex over ( )}-m for x>0, where x is the distance from the junction and m is a constant that describes the type of P-N junction, wherein for an abrupt varactor and linearly graded varactor, m is 0 and 1, respectively.

### Claim 6 (depends on 5)

The hyperabrupt varactor diode of claim 5, wherein the m value for a hyperabrupt varactor is between −1.2 to −2, wherein there is a rapid reduction in charge concentration as the distance from the P-N junction increases, thereby creating a retrograde dopant profile with the dopant concentration exhibiting a steep slope near the diffusion region.