# US 11,444,187 B2 · Insulated gate bipolar transistor and diode

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- Number: US 11,444,187 B2
- Document ID: US11444187B2
- Status: Granted
- Kind: B2
- Application number: 17/200,209
- Filed: 2021-03-12
- Published: 2021-07-01
- Granted: 2022-09-13
- Earliest claimed: 2016-07-06
- Assignees: Rohm Co., Ltd.
- Applicants: Rohm Co., Ltd.
- Inventors: Kohei Shinsho
- Web page: https://patentgrep.com/patent/US11444187B2

## CPC

- H10D 12/481: {having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs}
- H10D 12/038: {having a recessed gate, e.g. trench-gate IGBTs}
- H10D 12/411: {Insulated-gate bipolar transistors [IGBT]}
- H10D 12/421: {on insulating layers or insulating substrates, e.g. thin-film IGBTs}
- H10D 62/141: {Anode or cathode regions of thyristors; Collector or emitter regions of gated bipolar-mode devices, e.g. of IGBTs}
- H10D 62/142: {Anode regions of thyristors or collector regions of gated bipolar-mode devices}
- H10D 64/20: Electrodes characterised by their shapes, relative sizes or dispositions
- H10D 64/231: {Emitter or collector electrodes for bipolar transistors}
- H10D 64/233: {Cathode or anode electrodes for thyristors}
- H10D 84/161: {IGBT having built-in components}
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a semiconductor layer having a first principal surface on one side thereof and a second principal surface on the other side thereof, a channel region of a first conductivity type formed at a surface layer portion of the first principal surface of the semiconductor layer, an emitter region of a second conductivity type formed at a surface layer portion of the channel region in the semiconductor layer, a drift region of the second conductivity type formed in a region of the second principal surface side with respect to the channel region in the semiconductor layer so as to be electrically connected to the channel region, a collector region of the first conductivity type formed at a surface layer portion of the second principal surface of the semiconductor layer so as to be electrically connected to the drift region, a cathode region of the second conductivity type formed at a surface layer portion of the second principal surface of the semiconductor layer so as to be electrically connected to the drift region and including a continuously laid around line-shaped pattern, and a gate electrode formed at the first principal surface side of the semiconductor layer so as to face the channel region across an insulating film.

## Claims

### Claim 1

A Reverse Conducting-Insulated Gate Bipolar Transistor (RC-IGBT) semiconductor device comprising:
a semiconductor layer having a first principal surface on one side and a second principal surface on the other side;
a gate structure formed in the first principal surface;
a gate pad covering the first principal surface at an interval in a first direction X from one side of the first principal surface as viewed in plane, and electrically connected to the gate structure;
a collector region of a first conductivity type formed in a surface layer portion of the second principal surface; and
a plurality of cathode line regions of a second conductivity type that is formed in the surface layer portion of the second principal surface such as not to overlap the gate pad as viewed in plane, that extends in a band shape along the first direction X respectively as viewed in plane, and that is arranged at intervals in a second direction Y orthogonal to the first direction X as viewed in plane;
wherein the plurality of cathode line regions each has a first end portion located at a gate pad side and a second end portion located at an opposite side to the gate pad side as viewed in plane, and
regarding the plurality of cathode line regions, positions of the plurality of second end portions in the first direction X are aligned in the second direction Y as viewed in plane.

### Claim 2 (depends on 1)

The RC-IGBT semiconductor device according to claim 1,
wherein the gate pad is arranged at a peripheral portion of the first principal surface as viewed in plane.

### Claim 3 (depends on 2)

The RC-IGBT semiconductor device according to claim 2,
wherein the plurality of cathode line regions include at least one cathode line region that does not face the gate pad in the first direction X as viewed in plane and at least one cathode line region that does not face the gate pad in the second direction Y as viewed in plane.

### Claim 4 (depends on 3)

The RC-IGBT semiconductor device according to claim 3,
wherein the plurality of cathode line regions include at least one cathode line region that does not face the gate pad in the first direction X and the second direction Y as viewed in plane.

### Claim 5 (depends on 4)

The RC-IGBT semiconductor device according to claim 4,
wherein the gate pad is arranged along an intermediate portion of the one side of the first principal surface as viewed in plane.

### Claim 6 (depends on 5)

The RC-IGBT semiconductor device according to claim 5,
wherein the second principal surface includes a facing region that faces the gate pad as viewed in plane, a first region that is located at one side of the second direction Y with respect to the facing region as viewed in plane, and a second region that is located at the other side of the second direction Y with respect to the facing region and faces the first region across the facing region as viewed in plane, and
the plurality of cathode line regions are arranged in the surface layer portion of the second principal surface such as not to be positioned in the facing region, the first region and the second region.

### Claim 7 (depends on 6)

The RC-IGBT semiconductor device according to claim 6,
wherein the plurality of cathode line regions include at least one cathode line region that faces the first region in the first direction X as viewed in plane and at least one cathode line region that faces the second region in the first direction X as viewed in plane.

### Claim 8 (depends on 7)

The RC-IGBT semiconductor device according to claim 7,
wherein, regarding the plurality of cathode line regions, positions of the plurality of first end portions in the first direction X are aligned in the second direction Y as viewed in plane.

### Claim 9 (depends on 8)

The RC-IGBT semiconductor device according to claim 8,
wherein, regarding the first direction X, the plurality of cathode line regions each has a line length exceeding a width of the gate pad as viewed in plane.

### Claim 10 (depends on 9)

The RC-IGBT semiconductor device according to claim 9,
wherein, regarding the second direction Y, the plurality of cathode line regions each has a line width exceeding a width of the gate pad.

### Claim 11 (depends on 10)

The RC-IGBT semiconductor device according to claim 10,
wherein, when a cross line that intersects a central portion of the second principal surface along the first direction X and the second direction Y is set such as to divide the second principal surface into four areas as viewed in plane, parts of the plurality of cathode line regions are included into at least one of the four areas.

### Claim 12 (depends on 11)

The RC-IGBT semiconductor device according to claim 11,
wherein, when a straight line that crosses the gate pad in the first direction X is set as viewed in plane, the plurality of cathode line regions are arranged in a line symmetry with respect to the straight line.

### Claim 13 (depends on 12)

The RC-IGBT semiconductor device according to claim 12,
wherein the collector region is formed in a whole area of the surface layer portion of the second principal surface, and
the plurality of cathode line regions are formed such as to replace the first conductive type of the collector region with the second conductive type.

### Claim 14 (depends on 13)

The RC-IGBT semiconductor device according to claim 13,
wherein a plurality of the gate structures are arranged in a stripe pattern.

### Claim 15 (depends on 14)

The RC-IGBT semiconductor device according to claim 14, further comprising:
a gate finger that is electrically connected to the gate pad, that is selectively routed over the first principal surface, and that has a straight section extending along the first direction X as viewed in plane; and
wherein the plurality of cathode line regions parallelly extend along the straight section of the gate finger as viewed in plane.

### Claim 16 (depends on 15)

The RC-IGBT semiconductor device according to claim 15, further comprising:
a collector electrode covering the second principal surface and electrically connected to the collector region and the plurality of cathode line regions.

### Claim 17 (depends on 16)

The RC-IGBT semiconductor device according to claim 16,
wherein the gate structure is composed of a trench gate structure that includes a trench formed in the first principal surface, a gate insulating film covering a wall surface of the trench, and a gate electrode embedded in the trench across the gate insulating film.

### Claim 18 (depends on 17)

The RC-IGBT semiconductor device according to claim 17, further comprising:
a channel region of the first conductivity type formed in the surface layer portion of the first principal surface such as to be exposed from the trench;
an emitter region of the second conductivity type formed in a surface layer portion of the channel region such as to be exposed from the trench; and
an emitter pad covering the first principal surface at an interval from the gate pad and electrically connected to the emitter region; and
wherein the plurality of cathode line regions are formed in the surface layer portion of the second principal surface such as to overlap the emitter pad as viewed in plane.

### Claim 19 (depends on 18)

The RC-IGBT semiconductor device according to claim 18, further comprising:
a contact recessed portion formed in the first principal surface at an interval from the gate structure such as to expose the emitter region; and
a contact region of the first conductivity type formed in a region along the contact recessed portion in the channel region and having an impurity concentration higher than that of the channel region.

### Claim 20 (depends on 19)

The RC-IGBT semiconductor device according to claim 19, further comprising:
an insulating layer covering the first principal surface; and
wherein the gate pad and the emitter pad are formed on the insulating layer.