# US 11,444,182 B2 · Fin semiconductor device and method for making the same

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- Number: US 11,444,182 B2
- Document ID: US11444182B2
- Status: Granted
- Kind: B2
- Application number: 17/327,485
- Filed: 2021-05-21
- Published: 2021-12-02
- Granted: 2022-09-13
- Earliest claimed: 2020-05-29
- Assignees: Shanghai Huali Integrated Circuit Corporation
- Applicants: Shanghai Huali Integrated Circuit Corporation
- Inventors: Qiuming Huang; Jun Tan; Qiang Yan
- Web page: https://patentgrep.com/patent/US11444182B2

## CPC

- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 62/121: {oriented parallel to substrates}
- H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates}
- H10D 30/6735: {having gates fully surrounding the channels, e.g. gate-all-around}
- H10D 84/0128: {Manufacturing their channels}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

A manufacturing method of a fin semiconductor device is disclosed. The method includes: providing a substrate; etching the substrate the first time to form a fin channel structure which protrudes from the substrate; forming a protective oxide layer on two sidewalls and the top surface of the fin channel structure; etching a the second time to form the base part of the fin channel structure, wherein the base part is not covered by the protective layer; oxidizing the base part of the fin channel, when the upper part of the fin channel is blocked from oxidation by the protective layer; removing both the protective layer and the oxidized base part of the fin channel structure, so that the upper part of the fin channel structure is suspended over the substrate.

## Claims

### Claim 1

A method for manufacturing a fin semiconductor device, comprising steps of:
providing a substrate comprising a stack of layers on the substrate;
etching the substrate to form a fin channel structure for a first time, wherein the fin channel structure protrudes from the substrate;
forming a protective layer comprising a first portion on a top surface of the fin channel structure and a second portion on two sidewalls of the fin channel structure, wherein the protective layer comprises silicon oxide;
etching the substrate for a second time having a combined vertical dry etch and a lateral dry etch, wherein the vertical dry etch extends the fin channel structure deeper into the substrate and removes lower parts of the second portion of the protective layer to expose the sidewalls of the fin channel structure, wherein the lateral dry etch reacts with the sidewalls of the fin channel structure to reduce a width of a base part of the fin channel structure without changing a width of an upper part of the fin channel structure;
oxidizing the base part of the fin channel structure, without affecting the upper part of the fin channel structure;
removing the protective layer from the fin channel structure; and
removing the oxidized base part of the fin channel structure to suspend the upper part of the fin channel structure over the substrate.

### Claim 2 (depends on 1)

The method for manufacturing according to claim 1, wherein the stack of layers on the substrate comprises a first dielectric layer on an upper surface of the substrate and a barrier layer on an upper surface of the first dielectric layer, wherein the first dielectric layer comprises oxide and the barrier layer comprises nitride;
wherein etching the substrate for the first time further comprises:
etching the substrate to form the fin channel structure, wherein the fin channel structure remains directly under the first dielectric layer.

### Claim 3 (depends on 2)

The method for manufacturing according to claim 2, wherein the etching the substrate for the first time further comprises:
etching the first dielectric layer and the barrier layer from the surface of the substrate; and
wherein removing the protective layer and removing the oxidized base part of the fin channel structure further comprises:
removing the first dielectric layer.

### Claim 4 (depends on 2)

The method for manufacturing according to claim 2, wherein removing the protective layer and the oxidized base part of the fin channel structure further comprises steps of:
depositing a second dielectric layer on the substrate and on the protective layer of the upper part of the fin channel structure, wherein the second dielectric layer comprises oxide;
performing a planarization process on an upper surface of the second dielectric layer by applying the barrier layer as a stop layer;
removing the barrier layer exposed after the planarization process; and
removing the second dielectric layer, the protective layer, and the oxidized base part of the fin channel structure.

### Claim 5 (depends on 2)

The method for manufacturing according to claim 2, wherein forming the protective layer comprises steps of:
forming a third dielectric layer on the fin channel structure and the substrate, wherein the third dielectric layer comprises oxide; and
removing the third dielectric layer from the upper surface of the substrate except keeping the third dielectric layer on the top surface and the two sidewalls of the fin channel structure protection, wherein an etching process can be applied for removal.

### Claim 6 (depends on 1)

The method for manufacturing according to claim 1, wherein the method further comprises:
sequentially forming a gate dielectric layer and a gate layer on the upper part of the fin channel structure to form a gate-all-around structure.

### Claim 7 (depends on 6)

The method for manufacturing according to claim 6, wherein the gate dielectric layer comprises a high-dielectric constant material; and/or
wherein the gate layer comprises a metal gate material.

### Claim 8 (depends on 1)

The method for manufacturing according to claim 1, wherein the substrate comprises monocrystalline silicon.

### Claim 9 (depends on 1)

A fin semiconductor device, comprising a substrate and a fin structure protruding out on the substrate, wherein the fin structure comprises a fin source, a fin drain, and a fin channel connecting to the fin source and the fin drain,
wherein the fin channel suspends over the substrate;
wherein a gate-all-around structure is formed around the suspended fin channel; and
wherein the suspended fin channel is manufactured by the method according to claim 1.