# US 11,444,079 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,444,079 B2 - Document ID: US11444079B2 - Status: Granted - Kind: B2 - Application number: 17/002,392 - Filed: 2020-08-25 - Published: 2020-12-10 - Granted: 2022-09-13 - Earliest claimed: 2018-03-01 - Assignees: Socionext Inc. - Applicants: Socionext Inc. - Inventors: Hidetoshi Tanaka - Web page: https://patentgrep.com/patent/US11444079B2 ## CPC - H10D 84/83: of only insulated-gate FETs [IGFET] - H10D 8/50: PIN diodes - H10D 30/63: Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence) - H10D 62/122: {oriented at angles to substrates, e.g. perpendicular to substrates} - H10D 84/832: {comprising IGFETs having stacked nanowire, nanosheet or nanoribbon channels} - H10D 84/837: {comprising vertical IGFETs} - H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] - H10D 84/016: {the components including vertical IGFETs} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device includes: a semiconductor substrate; a VNW transistor being a functional element provided with a first projection formed on the semiconductor substrate, having a semiconductor material, and having a lower end and an upper end; a dummy functional element provided with a second projection formed on the semiconductor substrate, having a semiconductor material, having a lower end and an upper end, and arranged side by side with the first projection; and a first wiring formed above the first projection and above the second projection, electrically connected to the upper end of the first projection, and electrically isolated from the upper end of the second projection. Consequently, the semiconductor device capable of suppressing variation in characteristics of the VNW transistors is realized. ## Claims ### Claim 1 A semiconductor device, comprising: a semiconductor substrate; a functional element provided with a first projection formed on the semiconductor substrate, having a semiconductor material, and having a lower end and an upper end; a contact plug; a dummy functional element provided with a second projection formed on the semiconductor substrate, having a semiconductor material, having a lower end and an upper end that are electrically connected via the contact plug, and arranged side by side with the first projection in a plane view; and a first wiring formed above the first projection and above the second projection, electrically connected to the upper end of the first projection, and electrically isolated from the upper end of the second projection. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, further comprising: a first conductive film connected between the upper end of the first projection and the first wiring, wherein the first conductive film is not connected to the upper end of the second projection. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, further comprising: a first conductive film connected between the upper end of the first projection and the first wiring; and a second conductive film connected to the upper end of the second projection and electrically isolated from the first conductive film. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, further comprising: a first electrode formed on side surfaces of the first projection; and a second electrode integrally formed with the first electrode, on side surfaces of the second projection. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein: a projection arrangement region in which a plurality of the first projections and the second projection are arranged, is provided; a plurality of the first projections have the upper ends which are electrically connected to each other, and the lower ends which are electrically connected to each other, and a plurality of the first projections are arranged by being adjacent to each other in a plane view; and the second projection is arranged at a position which is a periphery of the first projections and which is along an outer periphery of the projection arrangement region in a plane view. ### Claim 6 (depends on 5) The semiconductor device according to claim 5, wherein: the projection arrangement region has a rectangular shape in a plane view; a plurality of the second projections are arranged at positions along four sides of the projection arrangement region in a plane view; and a plurality of the first projections are arranged by being surrounded by a plurality of the second projections in a plane view. ### Claim 7 (depends on 5) The semiconductor device according to claim 5, wherein: the projection arrangement region has a rectangular shape in a plane view; a plurality of the second projections are arranged along facing two sides out of four sides of the projection arrangement region in a plane view; and a plurality of the first projections are arranged between a plurality of the second projections arranged along the two sides in a plane view. ### Claim 8 (depends on 5) The semiconductor device according to claim 5, wherein: the projection arrangement region has a rectangular shape in a plane view; the second projections are arranged at positions of corners of the projection arrangement region in a plane view; and a plurality of the first projections are arranged by being adjacent to the second projections arranged at the positions of the corners, on four sides of the projection arrangement region. ### Claim 9 (depends on 1) The semiconductor device according to claim 1, wherein the functional element is at least one kind selected from a transistor, a diode, and a resistor element. ### Claim 10 A semiconductor device, comprising: a semiconductor substrate; a functional element provided with a first projection formed on the semiconductor substrate, having a semiconductor material, and having a lower end and an upper end; a dummy functional element provided with a second projection formed on the semiconductor substrate, having a semiconductor material, having a lower end and an upper end, and arranged side by side with the first projection in a plane view; a first wiring formed above the first projection and above the second projection, electrically connected to the upper end of the first projection, and electrically isolated from the upper end of the second projection; a first electrode formed on side surfaces of the first projection; and a second electrode formed on side surfaces of the second projection, and electrically isolated from the first electrode, wherein the upper end of the second projection and the lower end of the second projection of the dummy functional element, and the second electrode are electrically connected. ### Claim 11 (depends on 10) The semiconductor device according to claim 10, further comprising: a first conductive film connected between the upper end of the first projection and the first wiring, wherein the first conductive film is not connected to the upper end of the second projection. ### Claim 12 (depends on 10) The semiconductor device according to claim 10, further comprising: a first conductive film connected between the upper end of the first projection and the first wiring; and a second conductive film connected to the upper end of the second projection and electrically isolated from the first conductive film. ### Claim 13 (depends on 10) The semiconductor device according to claim 10, wherein: a projection arrangement region in which a plurality of the first projections and the second projection are arranged, is provided; a plurality of the first projections have the upper ends which are electrically connected to each other, and the lower ends which are electrically connected to each other, and a plurality of the first projections are arranged by being adjacent to each other in a plane view; and the second projection is arranged at a position which is a periphery of the first projections and which is along an outer periphery of the projection arrangement region in a plane view. ### Claim 14 (depends on 13) The semiconductor device according to claim 13, wherein: the projection arrangement region has a rectangular shape in a plane view; a plurality of the second projections are arranged at positions along four sides of the projection arrangement region in a plane view; and a plurality of the first projections are arranged by being surrounded by a plurality of the second projections in a plane view. ### Claim 15 (depends on 13) The semiconductor device according to claim 13, wherein: the projection arrangement region has a rectangular shape in a plane view; a plurality of the second projections are arranged along facing two sides out of four sides of the projection arrangement region in a plane view; and a plurality of the first projections are arranged between a plurality of the second projections arranged along the two sides in a plane view. ### Claim 16 (depends on 13) The semiconductor device according to claim 13, wherein: the projection arrangement region has a rectangular shape in a plane view; the second projections are arranged at positions of corners of the projection arrangement region in a plane view; and a plurality of the first projections are arranged by being adjacent to the second projections arranged at the positions of the corners, on four sides of the projection arrangement region. ### Claim 17 (depends on 10) The semiconductor device according to claim 10, wherein the functional element is at least one kind selected from a transistor, a diode, and a resistor element.