# US 11,444,072 B2 · Dual-port SRAM structure > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,444,072 B2 - Document ID: US11444072B2 - Status: Granted - Kind: B2 - Application number: 16/932,394 - Filed: 2020-07-17 - Published: 2021-08-26 - Granted: 2022-09-13 - Earliest claimed: 2020-02-25 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Co., Ltd. - Inventors: Jhon Jhy Liaw - Web page: https://patentgrep.com/patent/US11444072B2 ## CPC - H10D 89/10: Integrated device layouts - G11C 7/1075: {for multiport memories each having random access ports and serial ports, e.g. video RAM} - G11C 8/16: Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups - G11C 11/412: using field-effect transistors only - H10B 10/12: {comprising a MOSFET load element} - H10D 84/853: {comprising FinFETs} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G11C: STATIC STORES (semiconductor memory devices H10B) - H10B: ELECTRONIC MEMORY DEVICES ## Abstract The static random access memory (SRAM) cell of the present disclosure includes a first pull-down device, a second pull-down device, a first pass-gate device, and a second pass-gate device in a first p-well on a substrate; a third pull-down device, a fourth pull-down device, a third pass-gate device, and a fourth pass-gate device in a second p-well on the substrate; a first pull-up device and a second pull-up device in an n-well between the first p-well and the second p-well; and a first landing pad between the second pull-down device and the first pull-up device. The first landing pad is electrically coupled to a gate structure of the second pass-gate device by way of a first gate via. ## Claims ### Claim 1 A static random access memory (SRAM) cell comprising: a first pull-down device (PD-1), a second pull-down device (PD-2), a first pass-gate device (PG-1), and a second pass-gate device (PG-2) disposed in a first p-well on a substrate, wherein active regions of the second pass-gate device (PG-2) and the second pull-down device (PD-2) are aligned along a first direction; a third pull-down device (PD-3), a fourth pull-down device (PD-4), a third pass-gate device (PG-3), and a fourth pass-gate device (PG-4) disposed in a second p-well on the substrate, wherein active regions of the third pass-gate device (PG-3) and the third pull-down device (PD-3) are aligned along the first direction; a first pull-up device (PU-1) and a second pull-up device (PU-2) disposed in an n-well disposed between the first p-well and the second p-well, where an active region of the first pull-up device (PU-1) extends along the first direction; and a first landing pad disposed between the second pull-down device (PD-2) and the first pull-up device (PU-1), wherein the first landing pad is electrically coupled to a gate structure of the second pass-gate device (PG-2) by way of a first gate via. ### Claim 2 (depends on 1) The SRAM cell of claim 1, wherein the first gate via is disposed between the second pull-down device (PD-2) and the first pull-up device (PU-1). ### Claim 3 (depends on 1) The SRAM cell of claim 1, further comprising: a second landing pad disposed between the third pull-down device (PD-3) and the second pull-up device (PU-2), wherein the second landing pad is electrically coupled to a gate structure of a third pass-gate device (PG-3) by way of a second gate via. ### Claim 4 (depends on 3) The SRAM cell of claim 3, wherein the second gate via is disposed between the third pull-down device (PD-3) and the second pull-up device (PU-2). ### Claim 5 (depends on 1) The SRAM cell of claim 1, wherein a drain of the first pull-down device (PD-1), a drain of the second pull-down device (PD-2), and a drain the first pull-up device (PU-1) are electrically coupled to a first long contact. ### Claim 6 (depends on 1) The SRAM cell of claim 1, wherein a drain of the third pull-down device (PD-3), a drain of the fourth pull-down device (PD-4), and a drain the second pull-up device (PU-2) are electrically coupled to a first long contact. ### Claim 7 (depends on 1) The SRAM cell of claim 1, wherein a source of the first pull-down device (PD-1) and a source of the second pull-down device (PD-2) are electrically coupled to a third long contact. ### Claim 8 (depends on 1) The SRAM cell of claim 1, wherein a source of the third pull-down device (PD-3) and a source of the fourth pull-down device (PD-4) are electrically coupled to a third long contact. ### Claim 9 A static random access memory (SRAM) cell comprising: a first pull-down device (PD-1), a second pull-down device (PD-2), a first pass-gate device (PG-1), and a second pass-gate device (PG-2) disposed in a first p-well on a substrate; a third pull-down device (PD-3), a fourth pull-down device (PD-4), a third pass-gate device (PG-3), and a fourth pass-gate device (PG-4) disposed in a second p-well on the substrate; and a first pull-up device (PU-1) and a second pull-up device (PU-2) disposed in an n-well disposed between the first p-well and the second p-well, wherein the first pull-down device (PD-1), the second pull-down device (PD-2), and the first pull-up device (PU-1) share a gate structure extending along a first direction, wherein a drain of the first pull-down device (PD-1), a drain of the second pull-down device (PD-2), and a drain the first pull-up device (PU-1) are electrically coupled to a first long contact. ### Claim 10 (depends on 9) The SRAM cell of claim 9, further comprising: a first landing pad disposed between the second pull-down device (PD-2) and the first pull-up device (PU-1), wherein the first landing pad is electrically coupled to a gate structure of the second pass-gate device (PG-2) by way of a first gate via. ### Claim 11 (depends on 10) The SRAM cell of claim 10, wherein the first gate via is disposed adjacent to the first long contact. ### Claim 12 (depends on 9) The SRAM cell of claim 9, wherein a drain of the third pull-down device (PD-3), a drain of the fourth pull-down device (PD-4), and a drain the second pull-up device (PU-2) are electrically coupled to a second long contact. ### Claim 13 (depends on 12) The SRAM cell of claim 12, further comprising: a second landing pad disposed between the third pull-down device (PD-3) and the second pull-up device (PU-2), wherein the second landing pad is electrically coupled to a gate structure of the third pass-gate device (PG-3) by way of a second gate via. ### Claim 14 (depends on 13) The SRAM cell of claim 13, wherein the second gate via is disposed adjacent to the second long contact. ### Claim 15 A static random access memory (SRAM) cell comprising: a first pull-down device (PD-1), a second pull-down device (PD-2), a first pass-gate device (PG-1), and a second pass-gate device (PG-2) disposed in a first p-well on a substrate, wherein the first pass-gate device (PG-1) and the first pull-down device (PD-1) share a first active region extending along a first direction, wherein the second pass-gate device (PG-2) and the second pull-down device (PD-2) share a second active region extending along the first direction; a third pull-down device (PD-3), a fourth pull-down device (PD-4), a third pass-gate device (PG-3), and a fourth pass-gate device (PG-4) disposed in a second p-well on the substrate; and a first pull-up device (PU-1) and a second pull-up device (PU-2) disposed in an n-well disposed between the first p-well and the second p-well, where a third active region of the first pull-up device (PU-1) extends along the first direction, wherein the first active region and the second active region are spaced apart by a first spacing, wherein the second active region and the third active region are spaced apart by a second spacing greater than the first spacing. ### Claim 16 (depends on 15) The SRAM cell of claim 15, wherein a ratio of the second spacing to the first spacing is between 1.05 and 2. ### Claim 17 (depends on 15) The SRAM cell of claim 15, wherein the first active region comprises two fin structures, wherein the second active region comprises two fin structures, wherein the third active region comprises a single fin structure. ### Claim 18 (depends on 15) The SRAM cell of claim 15, further comprising: a first landing pad disposed between the second pull-down device (PD-2) and the first pull-up device (PU-1), wherein the first landing pad is electrically coupled to a gate structure of the second pass-gate device (PG-2) by way of a first gate via, wherein the first landing pad extends along the first direction. ### Claim 19 (depends on 18) The SRAM cell of claim 18, further comprising: a first long contact, wherein a drain of the first pull-down device (PD-1), a drain of the second pull-down device (PD-2), and a drain the first pull-up device (PU-1) are electrically coupled to the first long contact. ### Claim 20 (depends on 19) The SRAM cell of claim 19, wherein the first long contact extends along a second direction perpendicular to the first direction, wherein the first landing pad spans over the first long contact.