# US 11,444,056 B2 · Sandwich assembly scheme for thin film electrode array and integrated circuits on both sides of printed circuit board (PCB) and method of manufacture

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- Number: US 11,444,056 B2
- Document ID: US11444056B2
- Status: Granted
- Kind: B2
- Application number: 16/924,495
- Filed: 2020-07-09
- Published: 2021-01-14
- Granted: 2022-09-13
- Earliest claimed: 2019-07-12
- Assignees: Neuralink Corp.
- Applicants: Neuralink Corp.
- Inventors: Supin Chen; Camilo A. Diaz-Botia; Dongjin Seo; Vanessa M. Tolosa
- Web page: https://patentgrep.com/patent/US11444056B2

## CPC

- A61B 5/293: Invasive
- H10W 72/0198: {batch processes}
- A61B 5/263: characterised by the electrode materials
- A61B 5/271: Arrangements of electrodes with cords, cables or leads, e.g. single leads or patient cord assemblies
- A61N 1/0529: {Electrodes for brain stimulation}
- G01N 27/26: by investigating electrochemical variables; by using electrolysis or electrophoresis
- H05K 1/147: {at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit (H05K1/148 takes precedence)}
- H05K 3/3436: {having an array of bottom contacts, e.g. pad grid array or ball grid array components}
- H05K 3/361: {Assembling flexible printed circuits with other printed circuits}
- A61B 5/686: {Permanently implanted devices, e.g. pacemakers, other stimulators, biochips (A61B5/6861 takes precedence)}
- A61B 5/6868: {Brain}
- A61B 2562/046: in a matrix array
- A61B 2562/125: characterised by the manufacture of electrodes
- A61B 2562/164: the sensor is mounted in or on a conformable substrate or carrier
- A61B 2562/166: the sensor is mounted on a specially adapted printed circuit board
- A61B 2562/222: Electrical cables or leads therefor, e.g. coaxial cables or ribbon cables
- A61N 1/0526: {Head electrodes (A61N1/0551 takes precedence)}
- G06F 3/015: {Input arrangements based on nervous system activity detection, e.g. brain waves [EEG] detection, electromyograms [EMG] detection, electrodermal response detection}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 70/688: {Flexible insulating substrates}
- A61B: DIAGNOSIS; SURGERY; IDENTIFICATION (usefulness limited to only animals A61D)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- A61N: ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY (measurement of bioelectric currents A61B; surgical instruments, devices or methods for transferring non-mechanical forms of energy to or from the body A61B18/00; anaesthetic apparatus in general A61M; incandescent lamps H01K; infrared radiators for heating H05B)
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Disclosed is a sandwich assembly containing a thin film electrode array for use with high density electrodes. To minimize the volume required by the associated electronics, the electrode array and integrated circuits are sandwiched over a Printed Circuit Board (PCB), which may have other integrated circuits on an opposite side. Among other things, the disclosed apparatus, system, and method improve over previous systems by providing holes and vias that facilitate communication between a custom chip above the PCB and a field-programmable gate array (FPGA) below. The thin film electrode array can be fastened by bucking a pillar of stacked gold or other metal balls to rivet the thin film flex circuit. The system can include a thin film array having embedded wire traces and holes, a PCB having vias aligned with the holes, chips including an analog-to-digital converter (ADC) sandwiching the thin film, and solder connections from the chips through the holes to the vias.

## Claims

### Claim 1

A thin film electrode converter apparatus comprising:
a thin film having embedded wire traces, the wire traces leading from electrodes at a flexible distal end of the thin film to a two-dimensional (2D) array of conductive pads, wherein some of the wire traces connect with a first row of the conductive pads and other of the wire traces connect with a second row of the conductive pads, the second row being farther from the distal end than the first row, the thin film having a hole through the thin film;
a printed circuit board (PCB) having a via aligned with the hole through the thin film;
an analog-to-digital converter (ADC) sandwiching the thin film between the ADC and the PCB and having ADC inputs electrically connected with at least one of the first and second rows of conductive pads of the thin film; and
a solder connection running from an output of the ADC through the thin film hole to the PCB via.

### Claim 2 (depends on 1)

The apparatus of claim 1 further comprising:
an integrated circuit chip attached to a side of the PCB opposite the thin film and ADC, the integrated circuit chip connected with the PCB via.

### Claim 3 (depends on 2)

The apparatus of claim 2 wherein the integrated circuit chip comprises a field programmable gate array (FPGA).

### Claim 4 (depends on 2)

The apparatus of claim 2 wherein:
the ADC is configured to convert analog signals from multiple electrodes into digital signals and multiplex them together;
the solder connection is configured to route the multiplexed digital signal from the ADC on one side of the thin film to the integrated circuit chip on another side; and
the integrated circuit chip is configured to convert the multiplexed digital signals to a serialized data structure.

### Claim 5 (depends on 4)

The apparatus of claim 4 wherein the serialized data structure is in a format selected from the group consisting of Protocol Buffers, Avro, Thrift, Bond, and extensible markup language (XML).

### Claim 6 (depends on 1)

The apparatus of claim 1 wherein the ADC is configured to multiplex multiple digital signals together.

### Claim 7 (depends on 1)

The apparatus of claim 1 wherein each conductive pad of the thin film is at least 5 times wider than its respective wire trace.

### Claim 8 (depends on 1)

The apparatus of claim 1 further comprising:
a third row of holes through the thin film between the first and second rows; and
multiple solder connections running from outputs of the ADC through the third row of holes of the thin film to PCB vias.

### Claim 9 (depends on 1)

The apparatus of claim 1 further comprising:
a surface mount capacitor seated within a hole in the thin film; and
solder connections running from end terminations of the surface mount capacitor through to PCB vias.

### Claim 10 (depends on 1)

The apparatus of claim 1 further comprising:
an electrostatic discharge (ESD) capacitor connecting between a conductive pad of the thin film and a ground element.

### Claim 11 (depends on 1)

The apparatus of claim 1 wherein the PCB via is a blind via.

### Claim 12 (depends on 1)

The apparatus of claim 1 wherein the solder connection includes gold.

### Claim 13 (depends on 1)

The apparatus of claim 1 wherein the electrodes are biocompatible.

### Claim 14 (depends on 1)

The apparatus of claim 1 wherein the thin film includes two or more layers of embedded wire traces.

### Claim 15 (depends on 1)

The apparatus of claim 1 wherein the thin film through hole is between the first and second rows.

### Claim 16

A method of manufacturing a thin film electrode receiving apparatus, the method comprising:
providing a thin film having embedded wire traces, the wire traces leading from electrodes at a distal end of the thin film to a two-dimensional (2D) array of conductive pads, wherein some of the wire traces connect with a first row of the conductive pads and other of the wire traces connect with a second row of the conductive pads, the second row being farther from the distal end than the first row, the thin film having a hole through the thin film;
sandwiching the thin film between a printed circuit board (PCB) having a via and an analog-to-digital converter (ADC);
electrically connecting a first set of ADC inputs with at least one of the first and second rows of conductive pads of the thin film;
heating and forming a solder connection running from an output of the ADC through the thin film hole to the PCB via;
attaching an integrated circuit chip to a side of the PCB opposite the thin film and ADC; and
connecting the PCB via to the integrated circuit chip.

### Claim 17

A method of aligning and joining a thin film flex circuit with a rigid component, the method comprising:
depositing, using a ball bonder, a bottom metal ball on a rigid component;
stacking, using the ball bonder, another metal ball on top of the bottom metal ball to form a first pillar of stacked metal balls;
forming, using the ball bonder, a second pillar of stacked metal balls; and
aligning and placing a thin film flex circuit such that the first and second pillars of stacked metal balls project through holes in the thin film flex circuit;
wherein the pillars keep the thin film flex circuit taut and prevent wrinkling.

### Claim 18 (depends on 17)

The method of claim 17 further comprising:
bucking each pillar of stacked metal balls projecting through its respective hole to form a buck-tail with a diameter larger than that of the respective hole, thereby riveting the thin film flex circuit to the rigid component.

### Claim 19 (depends on 18)

The method of claim 18 wherein the pillars are bucked using a flip chip bonder.

### Claim 20 (depends on 17)

The method of claim 17 further comprising:
drawing, using the ball bonder, a continuous wire between the first and second pillars projecting through the holes, thereby fashioning a staple over the thin film flex circuit onto the rigid component.

### Claim 21 (depends on 17)

The method of claim 17 further comprising:
releasing the thin film flex circuit from a rigid carrier after the aligning and placing.

### Claim 22 (depends on 17)

The method of claim 17 wherein the rigid component is an integrated circuit (IC) chip, the method further comprising:
bonding a ball grid array of the IC chip to exposed pads on the thin film flex circuit.

### Claim 23 (depends on 17)

The method of claim 17 wherein the thin film flex circuit is between 5 μm and 20 μm thick.

### Claim 24 (depends on 17)

The method of claim 17 wherein the rigid component is selected from the group consisting of a printed circuit board (PCB) and an integrated circuit (IC) chip.

### Claim 25 (depends on 17)

The method of claim 17 wherein the metal balls comprise gold, copper, or aluminum.