# US 11,444,021 B2 · Device and package structure and method of forming the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,444,021 B2
- Document ID: US11444021B2
- Status: Granted
- Kind: B2
- Application number: 16/923,118
- Filed: 2020-07-08
- Published: 2020-10-22
- Granted: 2022-09-13
- Earliest claimed: 2015-05-29
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Hsien-Wei Chen; An-Jhih Su; Li-Hsien Huang
- Web page: https://patentgrep.com/patent/US11444021B2

## CPC

- H10W 20/42: Vias, e.g. via plugs
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 90/00: Package configurations
- H10P 50/28: of insulating materials
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 72/073: {of die-attach connectors}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/874: {On different surfaces}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/9413: {on encapsulations}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 90/28: the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
- H10W 90/722: {between stacked chips}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Device, package structure and method of forming the same are disclosed. The device includes a die encapsulated by an encapsulant, a conductive structure aside the die, and a dielectric layer overlying the conductive structure. The conductive structure includes a through via in the encapsulant, a redistribution line layer overlying the through via, and a seed layer overlying the redistribution line layer. The dielectric layer includes an opening, wherein the opening exposes a surface of the conductive structure, the opening has a scallop sidewall, and an included angle between a bottom surface of the dielectric layer and a sidewall of the opening is larger than about 60 degrees.

## Claims

### Claim 1

A package structure, comprising:
a die, laterally encapsulated by an encapsulant;
a conductive via structure disposed aside the die and penetrating through the encapsulant; and
a conductive connector, connected with the conductive via structure, wherein the conductive via structure protrudes from the encapsulant, and the conductive connector extends into the encapsulant and physically contacts an upper sidewall and a top surface of the conductive via structure.

### Claim 2 (depends on 1)

The package structure according to claim 1, further comprising a first dielectric layer disposed on the die and the encapsulant and a second dielectric layer disposed on the first dielectric layer, wherein the first and second dielectric layers surround the conductive connector.

### Claim 3 (depends on 2)

The package structure according to claim 2, further comprising a die attach film located between the die and the first dielectric layer.

### Claim 4 (depends on 3)

The package structure according to claim 3, wherein the conductive connector physically contacts the first and second dielectric layers.

### Claim 5 (depends on 1)

The package structure according to claim 1, further comprising another package structure connected to the conductive connector.

### Claim 6 (depends on 1)

The package structure according to claim 1, further comprising a redistribution structure connected with the conductive via structure, wherein the redistribution structure and the conductive connector are located at two opposite sides of the conductive via structure.

### Claim 7 (depends on 1)

The package structure according to claim 1, further comprising a dielectric layer disposed on the die and the encapsulant and surrounding the conductive connector.

### Claim 8

A device structure, comprising:
a die, encapsulated by an encapsulant;
a conductive via structure located aside the die and in the encapsulant;
a dielectric layer overlying the die and the encapsulant; and
a conductive connector, disposed on and connected with the conductive via structure, wherein the dielectric layer surrounds the conductive connector, the conductive connector extends beyond the conductive via structure, and the conductive connector physically contacts the encapsulant and the conductive via structure.

### Claim 9 (depends on 8)

The device structure according to claim 8, further comprising a seed layer overlying the conductive via structure, and the conductive connector physically contacts the seed layer.

### Claim 10 (depends on 8)

The device structure according to claim 8, further comprising a die attach film located between the die and the dielectric layer.

### Claim 11 (depends on 10)

The device structure according to claim 10, further comprising a redistribution structure connected with the conductive via structure, wherein the redistribution structure and the conductive connector are located at two opposite sides of the conductive via structure.

### Claim 12 (depends on 11)

The device structure according to claim 11, wherein the redistribution structure comprises under-bump metallization (UBM) layers and connectors located on the UBM layers.

### Claim 13 (depends on 12)

The device structure according to claim 12, wherein the die and the conductive via structure are electrically connected with the redistribution structure.

### Claim 14

A package structure, comprising:
a die laterally encapsulated by an encapsulant;
a conductive via structure disposed aside the die and penetrating through the encapsulant;
a seed layer overlying the conductive via structure; and
a conductive connector connected with the seed layer and the conductive via structure, wherein the conductive via structure protrudes from the encapsulant, and the conductive connector extends into the encapsulant and physically contacts the seed layer and an upper sidewall of the conductive via structure.

### Claim 15 (depends on 14)

The package structure of claim 14, further comprising a first dielectric layer disposed on the die and the encapsulant and a second dielectric layer disposed on the first dielectric layer, wherein the first and second dielectric layers surround the conductive connector.

### Claim 16 (depends on 15)

The package structure according to claim 15, further comprising a die attach film located between the die and the first dielectric layer.

### Claim 17 (depends on 15)

The package structure according to claim 15, wherein the conductive connector physically contacts the first and second dielectric layers.

### Claim 18 (depends on 14)

The package structure according to claim 14, further comprising another package structure connected to the conductive connector.

### Claim 19 (depends on 14)

The package structure according to claim 14, further comprising a redistribution structure connected with the conductive via structure, wherein the redistribution structure and the conductive connector are located at two opposite sides of the conductive via structure.

### Claim 20 (depends on 19)

The package structure according to claim 19, wherein the redistribution structure comprises under-bump metallization (UBM) layers and connectors located on the UBM layers.