# US 11,444,010 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,444,010 B2 - Document ID: US11444010B2 - Status: Granted - Kind: B2 - Application number: 17/060,545 - Filed: 2020-10-01 - Published: 2021-04-22 - Granted: 2022-09-13 - Earliest claimed: 2019-10-21 - Assignees: Renesas Electronics Corporation - Applicants: Renesas Electronics Corporation - Inventors: Kazunori Hasegawa; Yuichi Yato; Hiroyuki Nakamura; Yukihiro Sato; Hiroya Shimoyama - Web page: https://patentgrep.com/patent/US11444010B2 ## CPC - H10W 90/811: {Multiple chips on leadframes} - H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)} - H10W 70/417: {Bonding materials between chips and die pads} - H10W 70/461: {specially adapted for cooling} - H10W 70/465: {Bumps or wires} - H10W 70/466: {Tape carriers or flat leads} - H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00} - H10W 72/60: Strap connectors, e.g. thick copper clips for grounding of power devices - H10W 72/90: Bond pads, in general - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 72/073: {of die-attach connectors} - H10W 72/07337: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy} - H10W 72/07355: {changes in materials} - H10W 72/075: {of bond wires} - H10W 72/076: {of strap connectors} - H10W 72/07637: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy} - H10W 72/325: {Die-attach connectors having a filler embedded in a matrix} - H10W 72/351: {Materials of die-attach connectors} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/357: {Multiple die-attach connectors having different materials} - H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements} - H10W 72/5522: {comprising gold [Au]} - H10W 72/5524: {comprising aluminium [Al]} - H10W 72/5525: {comprising copper [Cu]} - H10W 72/634: {Cross-sectional shape} - H10W 72/646: {the connected ends being on auxiliary connecting means on bond pads, e.g. on a bump connector} - H10W 72/652: {comprising metals or metalloids, e.g. silver} - H10W 72/871: {Bond wires and strap connectors} - H10W 72/884: {Die-attach connectors and bond wires} - H10W 72/886: {Die-attach connectors and strap connectors} - H10W 72/925: {Bond pads having a filler embedded in a matrix} - H10W 72/926: {Multiple bond pads having different sizes} - H10W 72/932: {Plan-view shape, i.e. in top view} - H10W 72/9445: {Top-view layouts, e.g. mirror arrays} - H10W 72/951: {Materials of bond pads} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W 90/753: {between laterally-adjacent chips} - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W 90/766: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device includes: a semiconductor chip including a field effect transistor for switching; a die pad on which the semiconductor chip is mounted via a first bonding material; a lead electrically connected to a pad for source of the semiconductor chip through a metal plate; a lead coupling portion formed integrally with the lead; and a sealing portion for sealing them. A back surface electrode for drain of the semiconductor chip and the die pad are bonded via the first bonding material, the metal plate and the pad for source of the semiconductor chip are bonded via a second bonding material, and the metal plate and the lead coupling portion are bonded via a third bonding material. The first, second, and third bonding materials have conductivity, and an elastic modulus of each of the first and second bonding materials is lower than that of the third bonding material. ## Claims ### Claim 1 A semiconductor device comprising: a first semiconductor chip including a first field effect transistor for switching; a first chip mounting portion on which the first semiconductor chip is mounted via a first bonding material; a first lead electrically connected to a first pad for source of the first semiconductor chip through a first metal plate; a first metal portion formed integrally with the first lead; and a sealing body in which the first semiconductor chip, the first metal plate, the first metal portion, at least a part of the first chip mounting portion, and a part of the first lead are sealed, wherein a first back surface electrode for drain of the first semiconductor chip and the first chip mounting portion are bonded via the first bonding material, the first metal plate and the first pad for source of the first semiconductor chip are bonded via a second bonding material, the first metal plate and the first metal portion are bonded via a third bonding material, the first bonding material, the second bonding material, and the third bonding material have conductivity, and an elastic modulus of each of the first bonding material and the second bonding material is lower than that of the third bonding material. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, further comprising: a second semiconductor chip including a second field effect transistor for switching; a second chip mounting portion on which the second semiconductor chip is mounted via a fourth bonding material; a second lead electrically connected to a second pad for source of the second semiconductor chip through a second metal plate; and a second metal portion formed integrally with the second lead, wherein the sealing body seals the second semiconductor chip, the second metal plate, the second metal portion, at least a part of the second chip mounting portion, and a part of the second lead, a second back surface electrode for drain of the second semiconductor chip and the second chip mounting portion are bonded via the fourth bonding material, the second metal plate and the second pad for source of the second semiconductor chip are bonded via a fifth bonding material, the second metal plate and the second metal portion are bonded via a sixth bonding material, the fourth bonding material, the fifth bonding material, and the sixth bonding material have conductivity, and an elastic modulus of each of the first bonding material, the second bonding material, the fourth bonding material, and the fifth bonding material is lower than that of each of the third bonding material and the sixth bonding material. ### Claim 3 (depends on 2) The semiconductor device according to claim 2, wherein the first field effect transistor is for a high-side switch, and the second field effect transistor is for a low-side switch. ### Claim 4 (depends on 3) The semiconductor device according to claim 3, further comprising: a third semiconductor chip including a circuit configured to control each of the first semiconductor chip and the second semiconductor chip; and a third chip mounting portion on which the third semiconductor chip is mounted via a seventh bonding material, wherein the sealing body seals the third semiconductor chip and at least a part of the third chip mounting portion. ### Claim 5 (depends on 4) The semiconductor device according to claim 4, wherein an elastic modulus of the seventh bonding material is lower than that of each of the third bonding material and the sixth bonding material. ### Claim 6 (depends on 5) The semiconductor device according to claim 5, wherein the first bonding material, the second bonding material, the fourth bonding material, the fifth bonding material, and the seventh bonding material are made of the same bonding material, and the third bonding material and the sixth bonding material are made of the same bonding material. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, wherein each of the first bonding material, the second bonding material, the third bonding material, the fourth bonding material, the fifth bonding material, the sixth bonding material, and the seventh bonding material is a silver paste bonding material. ### Claim 8 (depends on 7) The semiconductor device according to claim 7, wherein a silver content of each of the first bonding material, the second bonding material, the fourth bonding material, the fifth bonding material, and the seventh bonding material is lower than that of each of the third bonding material and the sixth bonding material. ### Claim 9 (depends on 5) The semiconductor device according to claim 5, wherein the elastic modulus of each of the first bonding material, the second bonding material, the fourth bonding material, the fifth bonding material, and the seventh bonding material is 1 to 3 GPa, and the elastic modulus of each of the third bonding material and the sixth bonding material is 10 to 20 GPa. ### Claim 10 (depends on 4) The semiconductor device according to claim 4, wherein the first metal plate, the second metal plate, the first metal portion, and the second metal portion are made of the same material. ### Claim 11 (depends on 4) The semiconductor device according to claim 4, wherein the first metal plate, the second metal plate, the first metal portion, and the second metal portion are made of copper or copper alloy. ### Claim 12 (depends on 4) The semiconductor device according to claim 4, wherein back surfaces of the first chip mounting portion, the second chip mounting portion, and the third chip mounting portion are exposed from the sealing body. ### Claim 13 (depends on 4) The semiconductor device according to claim 4, wherein each of the first lead and the second lead is plural in number, the first metal portion couples the plurality of first leads, and the second metal portion couples the plurality of second leads. ### Claim 14 (depends on 4) The semiconductor device according to claim 4, wherein the first semiconductor chip, the second semiconductor chip, and the third semiconductor chip are used to form an inverter circuit. ### Claim 15 (depends on 1) The semiconductor device according to claim 1, wherein the first metal plate and the first metal portion are made of the same material. ### Claim 16 A semiconductor device comprising: a first semiconductor chip including a first field effect transistor for switching; a first chip mounting portion on which the first semiconductor chip is mounted via a first bonding material; a first lead electrically connected to a first pad for source of the first semiconductor chip through a first metal plate; a first metal portion formed integrally with the first lead; and a sealing body in which the first semiconductor chip, the first metal plate, the first metal portion, at least a part of the first chip mounting portion, and a part of the first lead are sealed, wherein a first back surface electrode for drain of the first semiconductor chip and the first chip mounting portion are bonded via the first bonding material, the first metal plate and the first pad for source of the first semiconductor chip are bonded via a second bonding material, the first metal plate and the first metal portion are bonded via a third bonding material, the first bonding material, the second bonding material, and the third bonding material have conductivity, each of the first bonding material, the second bonding material, and the third bonding material is a silver paste ponding material, and a silver content of each of the first bonding material and the second bonding material is lower than that of the third bonding material. ### Claim 17 (depends on 16) The semiconductor device according to claim 16, further comprising: a second semiconductor chip including a second field effect transistor for switching; a second chip mounting portion on which the second semiconductor chip is mounted via a fourth bonding material; a second lead electrically connected to a second pad for source of the second semiconductor chip through a second metal plate; and a second metal portion formed integrally with the second lead, wherein the sealing body seals the second semiconductor chip, the second metal plate, the second metal portion, at least a part of the second chip mounting portion, and a part of the second lead, a second back surface electrode for drain of the second semiconductor chip and the second chip mounting portion are bonded via the fourth bonding material, the second metal plate and the second pad for source of the second semiconductor chip are bonded via a fifth bonding material, the second metal plate and the second metal portion are bonded via a sixth bonding material, the fourth bonding material, the fifth bonding material, and the sixth bonding material have conductivity, each of the fourth bonding material, the fifth bonding material, and the sixth bonding material is a silver paste bonding material, and a silver content of each of the first bonding material, the second bonding material, the fourth bonding material, and the fifth bonding material is lower than that of each of the third bonding material and the sixth bonding material. ### Claim 18 (depends on 17) The semiconductor device according to claim 17, further comprising: a third semiconductor chip including a circuit configured to control each of the first semiconductor chip and the second semiconductor chip; and a third chip mounting portion on which the third semiconductor chip is mounted via a seventh bonding material, wherein the sealing body seals the third semiconductor chip and at least a part of the second chip mounting portion, the first field effect transistor is for a high-side switch, the second field effect transistor is for a low-side switch, the seventh bonding material is a silver paste bonding material, and a silver content of the seventh bonding material is lower than that of each of the third bonding material and the sixth bonding material. ### Claim 19 A semiconductor device comprising: a first semiconductor chip including a first field effect transistor for switching; a first chip mounting portion on which the first semiconductor chip is mounted via a first bonding material; a first lead electrically connected to a first pad for source of the first semiconductor chip through a first metal plate; a first metal portion formed integrally with the first lead; and a sealing body in which the first semiconductor chip, the first metal plate, the first metal portion, at least a part of the first chip mounting portion, and a part of the first lead are sealed, wherein a first back surface electrode for drain of the first semiconductor chip and the first chip mounting portion are bonded via the first bonding material, the first metal plate and the first pad for source of the first semiconductor chip are bonded via a second bonding material, the first metal plate and the first metal portion are bonded via a third bonding material, the first bonding material, the second bonding material, and the third bonding material have conductivity, an elastic modulus of the first bonding material is lower than that of each of the second bonding material and the third bonding material, and a bonding area between the first metal plate and the first pad for source of the first semiconductor chip via the second bonding material is smaller than that between the first chip mounting portion and the first back surface electrode for drain of the first semiconductor chip via the first bonding material. ### Claim 20 (depends on 19) The semiconductor device according to claim 19, further comprising: a second semiconductor chip including a second field effect transistor for switching; a second chip mounting portion on which the second semiconductor chip is mounted via a fourth bonding material; a second lead electrically connected to a second pad for source of the second semiconductor chip through a second metal plate; and a second metal portion formed integrally with the second lead, wherein the sealing body seals the second semiconductor chip, the second metal plate, the second metal portion, at least a part of the second chip mounting portion, and a part of the second lead, a second back surface electrode for drain of the second semiconductor chip and the second chip mounting portion are bonded via the fourth bonding material, the second metal plate and the second pad for source of the second semiconductor chip are bonded via a fifth bonding material, the second metal plate and the second metal portion are bonded via a sixth bonding material, the fourth bonding material, the fifth bonding material, and the sixth bonding material have conductivity, an elastic modulus of each of the first bonding material and the fourth bonding material is lower than that of each of the second bonding material, the third bonding material, the fifth bonding material, and the sixth bonding material, and a bonding area between the second metal plate and the second pad for source of the second semiconductor chip via the fifth bonding material is smaller than that between the second chip mounting portion and the second back surface electrode for drain of the second semiconductor chip via the fourth bonding material.