# US 11,444,005 B2 · Semiconductor device, imaging device, and manufacturing apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,444,005 B2 - Document ID: US11444005B2 - Status: Granted - Kind: B2 - Application number: 16/754,633 - Filed: 2018-10-05 - Published: 2020-11-12 - Granted: 2022-09-13 - Earliest claimed: 2017-10-19 - Assignees: Sony Semiconductor Solutions Corporation - Applicants: Sony Semiconductor Solutions Corporation - Inventors: Reijiroh Shohji - Web page: https://patentgrep.com/patent/US11444005B2 ## CPC - H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] - H04N 25/76: Addressed sensors, e.g. MOS or CMOS sensors - H10F 39/8057: {Optical shielding} - H10F 39/807: {Pixel isolation structures} - H10F 39/811: {Interconnections} - H10W 20/023: {the interconnections being through-semiconductor vias} - H10W 20/0234: {comprising etching via holes that stop on pads or on electrodes} - H10W 20/0242: {comprising etching via holes from the back sides of the chips, wafers or substrates} - H10W 20/0245: {comprising use of blind vias during the manufacture} - H10W 20/0265: {characterised by the sidewall insulation} - H10W 20/076: {in via holes or trenches} - H10W 72/90: Bond pads, in general - H10F 39/018: {of hybrid image sensors} - H10F 39/809: {of hybrid image sensors} - H10W 20/072: {of dielectric parts comprising air gaps} - H10W 20/46: comprising air gaps - H10W 70/65: Shapes or dispositions of interconnections - H10W 72/01931: {using blanket deposition} - H10W 72/01953: {by etching} - H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/921: {Structures or relative sizes of bond pads} - H10W 72/922: {Bond pads being integral with underlying chip-level interconnections} - H10W 72/9226: {with via interconnections} - H10W 72/923: {Bond pads having multiple stacked layers} - H10W 72/932: {Plan-view shape, i.e. in top view} - H10W 72/941: {Dispositions of bond pads} - H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 80/701: {characterised by the pads after the direct bonding} - H10W 90/792: {between multiple chips} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract The present technology relates to a semiconductor device, an imaging device, and a manufacturing apparatus, capable of providing a semiconductor substrate maintaining and improving insulating performance. A through hole that penetrates the semiconductor substrate, an electrode at the center of the through hole, and a space around the electrode are included. The through hole also penetrates an insulating film formed on the semiconductor substrate. A barrier metal is further included around the electrode. An insulating film is further included in the semiconductor substrate and the space. The semiconductor device has a multilayer structure, and the electrode connects wirings formed in different layers to each other. The present technology can be applied to, for example, an image sensor in which a logic circuit and a sensor circuit are laminated. ## Claims ### Claim 1 A semiconductor device, comprising: a through hole that penetrates a semiconductor substrate; an electrode in the through hole, wherein the electrode is around a part of the semiconductor substrate, and the part of the semiconductor substrate is at a center of the through hole; a barrier metal film around the electrode, wherein a material of the barrier metal film includes one of tantalum (Ta), titanium (Ti), tungsten (W), or zirconium (Zr); a space around the barrier metal film; and a first insulating film between the semiconductor substrate and the space, wherein the first insulating film is in contact with the semiconductor substrate. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, further comprising a second insulating film on the semiconductor substrate, wherein the through hole penetrates the second insulating film. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the semiconductor device has a multilayer structure that includes a plurality of layers, a first layer of the plurality of layers includes a first wiring, a second layer of the plurality of layers includes a second wiring, and the electrode connects the first wiring to the second wiring. ### Claim 4 (depends on 3) The semiconductor device according to claim 3, wherein the electrode and the first wiring include the same material. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, further comprising: a second insulating film on the semiconductor substrate, wherein the through hole penetrates the second insulating film; and an insulating material between the through hole and the second insulating film. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the electrode is connected to a bump. ### Claim 7 An imaging device, comprising: a semiconductor substrate; a plurality of pixels, wherein each of the plurality of pixels includes a photoelectric conversion unit that extends in a depth direction of the semiconductor substrate, and the photoelectric conversion unit of each of the plurality of pixels is configured to perform photoelectric conversion; and an inter-pixel light shielding unit between the photoelectric conversion unit of a first pixel of the plurality of pixels and a second pixel of the plurality of pixels, wherein the second pixel is adjacent to the first pixel, and the inter-pixel light shielding unit includes: a light shielding member at a center of the inter-pixel light shielding unit; a barrier metal film around the light shielding member, wherein a material of the barrier metal film includes one of tantalum (Ta), titanium (Ti), tungsten (W), or zirconium (Zr); a space between the barrier metal film and the semiconductor substrate; and an insulating film between the semiconductor substrate and the space, wherein the insulating film is in contact with the semiconductor substrate. ### Claim 8 (depends on 7) The imaging device according to claim 7, further comprising a light shielding film on an incident surface side of the photoelectric conversion unit, wherein the light shielding film and the light shielding member of the inter-pixel light shielding unit comprise the same material. ### Claim 9 A manufacturing apparatus to manufacture a semiconductor device, the semiconductor device including: a through hole that penetrates a semiconductor substrate; an electrode in the through hole, wherein the electrode is around a part of the semiconductor substrate, and the part of the semiconductor substrate is at a center of the through hole; a barrier metal film around the electrode, wherein a material of the barrier metal film includes one of tantalum (Ta), titanium (Ti), tungsten (W), or zirconium (Zr); a space around the barrier metal film; and an insulating film between the semiconductor substrate and the space, wherein the insulating film is in contact with the semiconductor substrate. ### Claim 10 (depends on 9) The manufacturing apparatus according to claim 9, further comprising a film comprising a specific material on a side surface of the through hole, wherein the space is based on removal of the film. ### Claim 11 (depends on 10) The manufacturing apparatus according to claim 10, wherein the film includes a two-layer film including different materials, and the space is based on removal of one-layer film of the two-layer film. ### Claim 12 (depends on 11) The manufacturing apparatus according to claim 11, wherein the two-layer film includes a SiC film and a SiO film, and the space is based on removal of the SiO film. ### Claim 13 (depends on 10) The manufacturing apparatus according to claim 10, wherein after formation of the through hole, the film, and the electrode, the semiconductor substrate is thinned, and the film is removed from the thinned semiconductor substrate.