# US 11,444,000 B2 · Charger

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- Number: US 11,444,000 B2
- Document ID: US11444000B2
- Status: Granted
- Kind: B2
- Application number: 15/953,443
- Filed: 2018-04-14
- Published: 2019-10-17
- Granted: 2022-09-13
- Earliest claimed: 2018-04-14
- Assignees: Alpha and Omega Semiconductor (Cayman) Ltd.
- Applicants: Alpha and Omega Semiconductor (Cayman) Ltd.
- Inventors: Yu-Ming Chen; Tien-Chi Lin; Guan-Yu Lin; Tin-Wei Chen
- Web page: https://patentgrep.com/patent/US11444000B2

## CPC

- H10W 40/258: {Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence)}
- H10W 70/442: {of multiple leadframes in a single chip}
- H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections
- H10W 70/635: {Through-vias}
- H10W 70/685: comprising multiple insulating layers
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/811: {Multiple chips on leadframes}
- H02J 7/70: characterised by the mechanical construction
- H10W 70/421: {Shapes or dispositions}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/753: {between laterally-adjacent chips}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY

## Abstract

A charger includes a thermal conductive plate for heat dissipation, and a transistor. The transistor includes a drain terminal of a first pulsating voltage level, and a source terminal of a second pulsating voltage level. The second pulsating voltage level is lower than the first pulsating voltage level. The source terminal is disposed closer to the thermal conductive plate than the drain terminal.

## Claims

### Claim 1

A charger, comprising:
a thermal conductive plate for heat dissipation; and
a transistor, comprising:
a drain terminal of a first pulsating voltage level; and
a source terminal of a second pulsating voltage level lower than the first pulsating voltage level;
wherein the source terminal is connected to the thermal conductive plate;
wherein the thermal conductive plate is disposed on a first surface of a mother board;
wherein the mother board comprises one or more thermal conductive layers embedded in the mother board between the first surface and a second surface opposite the first surface;
wherein the one or more thermal conductive layers are connected to the thermal conductive plate; and
wherein the thermal conductive plate is between the transistor and the mother board.

### Claim 2 (depends on 1)

The charger of claim 1, wherein the thermal conductive plate includes a copper clad.

### Claim 3 (depends on 1)

The charger of claim 1, wherein the one or more thermal conductive layers include one or more copper clads.

### Claim 4 (depends on 1)

The charger of claim 1 further comprising:
a controller configured to control on-time of the transistor.

### Claim 5 (depends on 4)

The charger of claim 4, wherein the controller includes one of a pulse-width modulation (PWM) controller or a constant on-time (COT) controller.

### Claim 6 (depends on 5)

The charger of claim 5, wherein the controller and the transistor are co-packaged in a semiconductor device.

### Claim 7 (depends on 1)

The charger of claim 1 further comprising a transformer, wherein the drain terminal of the transistor is coupled to a dotted terminal of a primary winding of the transformer.

### Claim 8

A charger, comprising:
a thermal conductive plate for heat dissipation; and
a transistor, comprising:
a drain terminal of a first pulsating voltage level; and
a source terminal of a second pulsating voltage level lower than the first pulsating voltage level;
wherein the source terminal is connected to the thermal conductive plate;
wherein the thermal conductive plate is disposed on a first surface of a mother board;
wherein the mother board comprises one or more thermal conductive layers embedded in the mother board between the first surface and a second surface opposite the first surface;
wherein the one or more thermal conductive layers are connected to the thermal conductive plate; and
wherein the source terminal is attached to a carrier and wherein the drain terminal is wire-bonded and is connected to a first plurality of pins of the carrier.

### Claim 9 (depends on 8)

The charger of claim 8, wherein the carrier includes a second plurality of pins attached to the thermal conductive plate.

### Claim 10

A charger, comprising:
a thermal conductive plate for heat dissipation; and
a semiconductor device, comprising:
a carrier comprising a die pad, a first plurality of pins and a second plurality of pins; and
a transistor attached to the carrier, the transistor comprising:
a drain terminal of a first pulsating voltage level, the drain terminal being wire-bonded and being connected to the first plurality of pins of the carrier; and
a source terminal of a second pulsating voltage level lower than the first pulsating voltage level, the source terminal being attached to the die pad of the carrier,
wherein the second plurality of pins are connected to the die pad;
wherein the second plurality of pins are exposed from the semiconductor device; and
wherein the second plurality of pins are attached to the thermal conductive plate.

### Claim 11 (depends on 10)

The charger of claim 10, wherein the die pad of the carrier is attached to the thermal conductive plate.

### Claim 12 (depends on 10)

The charger of claim 10, wherein the thermal conductive plate includes a copper clad.

### Claim 13 (depends on 10)

The charger of claim 10, wherein the thermal conductive plate is disposed on a mother board;
wherein the mother board comprises a thermal conductive layer embedded in the mother board; and
wherein the thermal conductive layer is connected to the thermal conductive plate.

### Claim 14 (depends on 13)

The charger of claim 13, wherein the thermal conductive layer includes a copper clad.

### Claim 15 (depends on 10)

The charger of claim 10 further comprising:
a controller configured to control on-time of the transistor.

### Claim 16 (depends on 15)

The charger of claim 15, wherein the controller includes one of a pulse-width modulation (PWM) controller or a constant on-time (COT) controller.

### Claim 17 (depends on 16)

The charger of claim 16, wherein the controller and the transistor are co-packaged in the semiconductor device.

### Claim 18 (depends on 10)

The charger of claim 10 further comprising a transformer, wherein the drain terminal of the transistor is coupled to a dotted terminal of a primary winding of the transformer.