# US 11,443,949 B2 · Method of selectively forming metal silicides for semiconductor devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,443,949 B2 - Document ID: US11443949B2 - Status: Granted - Kind: B2 - Application number: 16/823,071 - Filed: 2020-03-18 - Published: 2020-09-24 - Granted: 2022-09-13 - Earliest claimed: 2019-03-20 - Assignees: Tokyo Electron Limited - Applicants: Tokyo Electron Limited - Inventors: Kandabara N. Tapily - Web page: https://patentgrep.com/patent/US11443949B2 ## CPC - H10D 64/0112: {using conductive layers comprising silicides} - H10D 84/017: {Manufacturing their source or drain regions, e.g. silicided source or drain regions} - H10D 64/01125: {the silicides being formed by chemical reaction with the semiconductor after the contact hole formation} - H10D 84/0186: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10W 20/033: {in openings in dielectrics} - H10W 20/047: {by introducing additional elements therein} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A substrate processing method includes providing a substrate containing a first semiconductor material and a second semiconductor material, treating the first semiconductor material and the second semiconductor material with a chemical source that selectively forms a chemical layer on the second semiconductor material relative to the first semiconductor material, and exposing the substrate to a first metal-containing precursor that selectively deposits a first metal-containing layer on the first semiconductor material relative to the chemical layer on the second semiconductor material. The method can further include annealing the substrate to react the first metal-containing layer with the first semiconductor material to form a first metal silicide layer, removing the chemical layer from the second semiconductor material, depositing a second metal-containing layer on the second semiconductor material, and annealing the substrate to react the second metal-containing layer with the second semiconductor material to form a second metal silicide layer. ## Claims ### Claim 1 A substrate processing method, comprising: providing a substrate containing a first semiconductor material that includes germanium (Ge) and a second semiconductor material that includes doped silicon (Si); treating the first semiconductor material and the second semiconductor material with an oxidation source that includes a plasma-excited process gas containing H2 and O2, wherein the oxidation source selectively reacts with the second semiconductor material to form an oxide layer on the second semiconductor material relative to the first semiconductor material; exposing the substrate to a first metal-containing precursor that selectively deposits a first metal-containing layer on the first semiconductor material relative to the oxide layer on the second semiconductor material, wherein the first metal-containing layer contains ruthenium (Ru) metal, platinum (Pt) metal, cobalt (Co) metal, nickel (Ni) metal, palladium (Pd) metal, molybdenum (Mo) metal, tungsten (W) metal, vanadium (V) metal, or a combination thereof. ### Claim 2 (depends on 1) The method of claim 1, further comprising annealing the substrate to react the first metal-containing layer with the first semiconductor material. ### Claim 3 (depends on 2) The method of claim 2, following the annealing, removing any remaining unreacted portion of the first metal-containing layer from the substrate. ### Claim 4 (depends on 2) The method of claim 2, further comprising: removing the oxide layer from the second semiconductor material. ### Claim 5 (depends on 4) The method of claim 4, further comprising: following the removing, depositing a second metal-containing layer on the second semiconductor material. ### Claim 6 (depends on 5) The method of claim 5, further comprising: annealing the substrate to react the second metal-containing layer with the second semiconductor material. ### Claim 7 (depends on 5) The method of claim 5, wherein the second metal-containing layer includes titanium (Ti) metal, nickel (Ni) metal, a NiPt alloy, cobalt (Co) metal, molybdenum (Mo) metal, tungsten (W) metal, vanadium (V) metal, or a combination thereof. ### Claim 8 (depends on 1) The method of claim 1, wherein the first semiconductor material includes doped SiGe or doped Ge and the second semiconductor material includes doped Si. ### Claim 9 (depends on 1) The method of claim 1, wherein the substrate includes a positive-channel field emission transistor (PFET) contact region that contains the first semiconductor material and a negative-channel field emission transistor (NFET) contact region that includes the second semiconductor material. ### Claim 10 A substrate processing method, comprising: providing a substrate containing a first semiconductor material that includes germanium (Ge) and a second semiconductor material that includes doped Si; treating the substrate with an oxidation source that includes a plasma-excited process gas containing H2 and O2, wherein the oxidation source that selectively reacts with the first semiconductor material to forms an oxide layer on the second semiconductor material relative to the first semiconductor material; exposing the substrate to a first metal-containing precursor that selectively deposits a first metal-containing layer on the first semiconductor material relative to the oxide layer on the second semiconductor material; annealing the substrate to react the first metal-containing layer with the first semiconductor material; removing the oxide layer from the second semiconductor material; depositing a second metal-containing layer on the second semiconductor material; and annealing the substrate to react the second metal-containing layer with the second semiconductor material, wherein the first metal-containing layer contains ruthenium (Ru) metal, platinum (Pt) metal, cobalt (Co) metal, nickel (Ni) metal, palladium (Pd) metal, molybdenum (Mo) metal, tungsten (W) metal, vanadium (V) metal, or a combination thereof, and wherein the second metal-containing layer includes titanium (Ti) metal, nickel (Ni) metal, NiPt alloy, cobalt (Co) metal, molybdenum (Mo) metal, tungsten (W) metal, vanadium (V) metal, or a combination thereof. ### Claim 11 (depends on 10) The method of claim 10, wherein the first semiconductor material includes doped SiGe or doped Ge and the second semiconductor material includes doped Si. ### Claim 12 (depends on 10) The method of claim 10, wherein the substrate includes a positive-channel field emission transistor (PFET) contact region that contains the first semiconductor material and a negative-channel field emission transistor (NFET) contact region that includes the second semiconductor material. ### Claim 13 (depends on 1) The method of claim 1, wherein the first semiconductor material is doped with boron (B), gallium (Ga), or aluminum (Al), and the second semiconductor material is doped with phosphorus (P), antimony (Sb), arsenic (As), or bismuth (Bi). ### Claim 14 (depends on 10) The method of claim 10, wherein the first semiconductor material is doped with boron (B), gallium (Ga), or aluminum (Al), and the second semiconductor material is doped with phosphorus (P), antimony (Sb), arsenic (As), or bismuth (Bi).