# US 11,443,945 B2 · Manufacturing method for array substrate

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- Number: US 11,443,945 B2
- Document ID: US11443945B2
- Status: Granted
- Kind: B2
- Application number: 16/618,909
- Filed: 2019-11-12
- Published: 2022-01-06
- Granted: 2022-09-13
- Earliest claimed: 2019-04-23
- Assignees: Tcl China Star Optoelectronics Technology Co., Ltd.
- Applicants: Tcl China Star Optoelectronics Technology Co., Ltd.
- Inventors: Jinyang Zhao
- Web page: https://patentgrep.com/patent/US11443945B2

## CPC

- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/0314: {of lateral top-gate TFTs comprising only a single gate}
- H10D 84/01: Manufacture or treatment
- H10D 86/01: Manufacture or treatment
- H10D 86/021: {of multiple TFTs}
- H10D 86/0221: {comprising manufacture, treatment or patterning of TFT semiconductor bodies}
- H10D 86/431: {having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs}
- H10D 86/60: wherein the TFTs are in active matrices
- H10P 14/2923: {being conductive materials, e.g. metallic silicides}
- H10P 14/3241: {being conductive materials}
- H10P 14/3808: {using laser beams}
- H10P 14/3816: {Pulsed laser beam}
- H10W 20/068: {by using a laser, e.g. laser cutting or laser direct writing}
- H10D 86/411: {characterised by materials, geometry or structure of the substrates}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

The present invention provides a manufacturing method of an array substrate, including steps of: providing a flexible substrate layer, forming a buffer layer, forming an active layer, forming a gate insulating layer, forming a gate layer, forming an interlayer insulating layer, forming a source and drain layer, forming an organic planarization layer, forming an anode layer. An array substrate manufactured by the above manufacturing method, and the array substrate includes laminated a flexible substrate layer, a buffer layer, an active layer, a gate insulating layer, a gate layer, an interlayer insulating layer, a source and drain layer, an organic planarization layer, and an anode layer, which are disposed in a stack.

## Claims

### Claim 1

A manufacturing method of an array substrate, comprising steps of:
providing a flexible substrate layer;
forming a buffer layer on the flexible substrate layer;
forming an active layer on the buffer layer, and patterning the active layer;
forming a gate insulating layer on the active layer;
forming a gate layer on the gate insulating layer by using a pulsed laser to melt copper nanoparticles, wherein a wavelength of the pulsed laser ranges from 350 to 1064 nm, and a scanning speed of the pulsed laser ranges from 5 to 10 mm/s;
forming an interlayer insulating layer on the gate layer and defining openings in the interlayer insulating layer;
patterning a source and drain layer on the interlayer insulating layer and in the openings;
forming an organic planarization layer on the source and drain layer; and
forming an anode layer on the organic planarization layer to obtain the array substrate.

### Claim 2 (depends on 1)

The manufacturing method of the array substrate according to claim 1, wherein the source and drain layer is patterned by using the pulsed laser to melt the copper nanoparticles, and the wavelength of the pulsed laser ranges from 350 to 1064 nm.

### Claim 3 (depends on 2)

The manufacturing method of the array substrate according to claim 2, wherein a scanning speed of the pulsed laser ranges from 5 to 10 mm/s for forming the source and drain layer.

### Claim 4 (depends on 1)

The manufacturing method of the array substrate according to claim 1, wherein the pulsed laser is generated by a pulsed laser equipment.

### Claim 5 (depends on 4)

The manufacturing method of the array substrate according to claim 4, wherein the pulsed laser equipment comprises:
a pulsed laser device for generating the pulsed laser;
a filter disposed at an exit port of the pulsed laser of the pulsed laser device, wherein the filter is used to pass the pulsed laser having the wavelength ranging from 350 to 1064 nm;
a beam correcting unit disposed on a side of the filter away from the pulsed laser device, wherein a central axis of the beam correcting unit coincides with a central axis of the pulsed laser;
a laser scanning unit disposed on a side of the beam correcting unit away from the filter unit for receiving and deflecting the pulsed laser; and
a laser focusing unit disposed at an exit port of the laser scanning unit for focusing the pulsed laser.

### Claim 6 (depends on 5)

The manufacturing method of the array substrate according to claim 5, wherein the scanning speed of the pulsed laser is controlled by controlling a rotating speed of a galvanometer scanner of the laser scanning unit.