# US 11,443,816 B2 · Managing digitally-controlled charge pump operation in a memory sub-system

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- Number: US 11,443,816 B2
- Document ID: US11443816B2
- Status: Granted
- Kind: B2
- Application number: 17/108,293
- Filed: 2020-12-01
- Published: 2022-06-02
- Granted: 2022-09-13
- Earliest claimed: 2020-12-01
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Michele Piccardi
- Web page: https://patentgrep.com/patent/US11443816B2

## CPC

- G11C 16/30: Power supply circuits
- G11C 5/145: {Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor (G11C5/141 takes precedence)}
- G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)}
- G11C 16/08: Address circuits; Decoders; Word-line control circuits
- G11C 16/10: Programming or data input circuits
- G11C 16/26: Sensing or reading circuits; Data output circuits
- G11C 16/3404: {Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells}
- G11C 29/021: {in voltage or current generators}
- G11C 29/028: {with adaption or trimming of parameters}
- G11C 16/0483: {comprising cells having several storage transistors connected in series}
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A first digitally-controlled pump voltage level is established for a charge pump coupled to a wordline of a memory device of a memory sub-system. A determination is made whether a measured digitally-controlled voltage level of the wordline and the first digitally-controlled pump voltage level satisfy a condition. In response to determining that the condition is satisfied, the first digitally-controlled pump voltage level applied to the charge pump is caused to change to a second digitally-controlled pump voltage level.

## Claims

### Claim 1

A memory device comprising:
a memory array; and
control logic, operatively coupled with the memory array, to perform operations comprising:
establishing, by a processing device, a first digitally-controlled pump voltage level of a charge pump coupled to a wordline associated with the memory array;
determining that a measured digitally-controlled voltage level of the wordline and the first digitally-controlled pump voltage level satisfy a condition; and
in response to determining that the condition is satisfied, generating an update signal causing the first digitally-controlled pump voltage level applied to the charge pump to change to a second digitally-controlled pump voltage level to establish a target wordline voltage level of the wordline.

### Claim 2 (depends on 1)

The memory device of claim 1, wherein the condition is satisfied when a difference between the measured digitally-controlled voltage level of the wordline and the first digitally-controlled pump voltage level is less than or equal to a threshold level.

### Claim 3 (depends on 1)

The memory device of claim 1, the operations further comprising generating a first update signal to increase the first digitally-controlled pump voltage level to the second digitally-controlled pump voltage level.

### Claim 4 (depends on 1)

The memory device of claim 1, the operations further comprising generating a plurality of update signals to increase a voltage level of the charge pump up to reaching a charge pump target regulation voltage level.

### Claim 5 (depends on 1)

The memory device of claim 1, wherein the first digitally-controlled pump voltage level is less than the second digitally-controlled pump voltage level.

### Claim 6 (depends on 1)

The memory device of claim 1, the operations further comprising:
determining the measured digitally-controlled voltage level satisfies a pump stage condition; and
in response to satisfying the pump stage condition, increasing a number of stages of the charge pump from a first number of stages to a second number of stages.

### Claim 7 (depends on 6)

The memory device of claim 6, wherein the pump stage condition is satisfied when the measured digitally-controlled voltage level exceeds a pump stage transition threshold voltage level.

### Claim 8

A memory device comprising:
a memory array; and
control logic, operatively coupled with the memory array, to perform operations comprising:
in response to a first condition associated with a first threshold level being satisfied, causing a first digitally-controlled pump voltage level applied to a charge pump to change to a second digitally-controlled pump voltage level;
determining that a measured digitally-controlled voltage level associated with a wordline satisfies a second condition; and
in response to determining that the condition is satisfied, causing a number of stages of the charge pump to increase from a first number of stages to a second number of stages to establish a target wordline voltage level of the wordline.

### Claim 9 (depends on 8)

The memory device of claim 8, wherein the first condition is satisfied when a difference between a previously measured digitally-controlled voltage level associated with the wordline and the first digitally-controlled pump voltage level is less than or equal to a first threshold voltage level.

### Claim 10 (depends on 9)

The memory device of claim 9, wherein the second condition is satisfied when the measured digitally-controlled voltage level associated with the wordline exceeds a second threshold voltage level.

### Claim 11 (depends on 8)

The memory device of claim 8, the operations further comprising generating an update signal to increase the number of stages of the charge pump from the first number of stages to the second number of stages.

### Claim 12 (depends on 8)

The memory device of claim 8, the operations further comprising generating a plurality of update signals to increase a voltage level of the charge pump to a charge pump target regulation voltage level.

### Claim 13 (depends on 8)

The memory device of claim 8, wherein the first number of stages is less than the second number of stages.

### Claim 14

A non-transitory computer readable medium comprising instructions, which when executed by a processing device, cause the processing device to perform operations comprising:
establishing a first digitally-controlled pump voltage level of a charge pump coupled to a wordline of a memory device;
determining that a measured digitally-controlled voltage level of the wordline and the first digitally-controlled pump voltage level satisfy a condition; and
in response to determining that the condition is satisfied, causing the first digitally-controlled pump voltage level applied to the charge pump to change to a second digitally-controlled pump voltage level to establish a target wordline voltage level of the wordline.

### Claim 15 (depends on 14)

The non-transitory computer readable medium of claim 14, wherein the condition is satisfied when a difference between the measured digitally-controlled voltage level of the wordline and the first digitally-controlled pump voltage level is less than or equal to a threshold level.

### Claim 16 (depends on 14)

The non-transitory computer readable medium of claim 14, the operations further comprising generating a first update signal to increase the first digitally-controlled pump voltage level to the second digitally-controlled pump voltage level.

### Claim 17 (depends on 14)

The non-transitory computer readable medium of claim 14, the operations further comprising generating a plurality of update signals to increase a voltage level of the charge pump to a charge pump threshold voltage level.

### Claim 18 (depends on 14)

The non-transitory computer readable medium of claim 14, wherein the first digitally-controlled pump voltage level is less than the second digitally-controlled pump voltage level.

### Claim 19 (depends on 14)

The non-transitory computer readable medium of claim 14, the operations further comprising:
determining the measured digitally-controlled voltage level satisfies a pump stage condition; and
in response to satisfying the pump stage condition, increasing a number of stages of the charge pump from a first number of stages to a second number of stages.

### Claim 20 (depends on 19)

The non-transitory computer readable medium of claim 19, wherein the pump stage condition is satisfied when the measured digitally-controlled voltage level exceeds a pump stage transition threshold voltage level.
