# US 11,443,778 B1 · Peak current reduction using dynamic clocking during charge pump recovery period > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,443,778 B1 - Document ID: US11443778B1 - Status: Granted - Kind: B1 - Application number: 17/224,540 - Filed: 2021-04-07 - Granted: 2022-09-13 - Earliest claimed: 2021-04-07 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Vivek Venkata Kalluru; Michele Piccardi - Web page: https://patentgrep.com/patent/US11443778B1 ## CPC - G11C 5/145: {Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor (G11C5/141 takes precedence)} - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A system includes a charge pump to charge wordlines of a memory array, a pump regulator coupled including a level detector, and dynamic clock logic coupled between the level detector and an oscillator. The logic provides clock signals to the charge pump and is to perform operations including: detecting that the charge pump has entered a recovery period; causing the oscillator to output, to the charge pump during a first time period of the recovery period, a first clock signal comprising a lower frequency than output during a time period preceding the recovery period; detecting that a voltage level from the level detector satisfies a trip point criterion; and causing the oscillator to output, to the charge pump during a second time period of the recovery period and responsive to the detecting, a second clock signal comprising a higher frequency than output during the time period preceding the recovery period. ## Claims ### Claim 1 A system comprising: a charge pump operatively coupled with one or more wordlines of a memory array; a pump regulator coupled with the charge pump and comprising a level detector; and dynamic clock logic coupled between the level detector and an oscillator that provides clock signals to the charge pump, wherein the dynamic clock logic is to perform operations comprising: detecting that the charge pump has entered a recovery period; causing the oscillator to output, to the charge pump during a first time period of the recovery period, a first clock signal comprising a lower frequency than output during a time period preceding the recovery period; detecting that a voltage level from the level detector satisfies a trip point criterion; and causing the oscillator to output, to the charge pump during a second time period of the recovery period and responsive to the detecting that the voltage level from the level detector satisfies the trip point criterion, a second clock signal comprising a higher frequency than output during the time period preceding the recovery period. ### Claim 2 (depends on 1) The system of claim 1, wherein the first time period is at least a fourth longer than that of the time period preceding the recovery period and the second time period is at least a third shorter than that of the time period preceding the recovery period. ### Claim 3 (depends on 1) The system of claim 1, wherein the operations further comprise, upon exiting the recovery period, causing the oscillator to output a static clock signal of a frequency that is substantially equal to that output during the time period preceding the recovery period. ### Claim 4 (depends on 1) The system of claim 1, wherein the operations further comprise determining the trip point criterion by solving for criteria comprising: two peak currents from the charge pump during the recovery period are approximately equal; and a combination of the first time period and the second time period are approximately equal to an entirety of the recovery period. ### Claim 5 (depends on 1) The system of claim 1, wherein the trip point criterion comprises a second trip point criterion, wherein the operations further comprise: detecting that a voltage level from the charge pump satisfies a first trip point criterion; and causing the oscillator to output, to the charge pump during a third time period between the first time period and the second time period and responsive to detecting the first trip point criterion, a third clock signal comprising an intermediate frequency between the higher frequency and the lower frequency. ### Claim 6 (depends on 5) The system of claim 5, wherein the operations further comprise determining the first trip point criterion and the second trip point criterion by solving for criteria comprising: three peak currents from the charge pump during the recovery period are approximately equal; and a combination of the first time period, the second time period, and the third time period are approximately equal to an entirety of the recovery period. ### Claim 7 (depends on 1) The system of claim 1, wherein the trip point criterion further comprises a plurality of trip point values, the trip point criterion is a final trip point value of the plurality of trip point values, and wherein the operations further comprise: detecting each of a plurality of voltage levels from the charge pump that satisfy each respective trip point value of the plurality of trip point values; and causing the oscillator to output, to the charge pump sequentially during each of a plurality of time periods in response to detecting a respective voltage level of the plurality of voltage levels, a subsequent clock signal of a plurality of clock signals, which include the first clock signal and the second clock signal, wherein each subsequent clock signal comprises an increasingly higher frequency such that a final clock signal during a final time period of the plurality of time periods has a highest frequency of the plurality of clock signals. ### Claim 8 An apparatus comprising: a charge pump operatively coupled with one or more wordlines of a memory array; and a voltage-controlled oscillator coupled with an output of the charge pump, the voltage-controlled oscillator to provide clock signals to the charge pump depending on a voltage level of the output of the charge pump, wherein the voltage-controlled oscillator is to perform operations comprising: detecting that the charge pump has entered a recovery period; outputting, to the charge pump during a first time period of the recovery period and responsive to the detecting that the charge pump has entered the recovery period, a first clock signal comprising a lower frequency than output during a time period preceding the recovery period; detecting that a voltage level from the charge pump satisfies a trip point criterion; and outputting, to the charge pump during a second time period of the recovery period, a second clock signal comprising a higher frequency than output during the time period preceding the recovery period. ### Claim 9 (depends on 8) The apparatus of claim 8, wherein the first time period is at least a fourth longer than that of the time period preceding the recovery period and the second time period is at least a third shorter than that of the time period preceding the recovery period. ### Claim 10 (depends on 8) The apparatus of claim 8, wherein the operations further comprise, upon exiting the recovery period, outputting a static clock signal of a frequency that is substantially equal to that output during the time period preceding the recovery period. ### Claim 11 (depends on 8) The apparatus of claim 8, further comprising control logic coupled with the voltage-controlled oscillator, wherein the control logic is to perform second operations comprising: determining the trip point criterion by solving for criteria including: two peak currents from the charge pump during the recovery period are approximately equal; and a combination of the first time period and the second time period are approximately equal to an entirety of the recovery period; and transmitting trim bits to the voltage-controlled oscillator indicative of the trip point criterion. ### Claim 12 (depends on 8) The apparatus of claim 8, wherein the trip point criterion comprises a second trip point criterion, wherein the operations further comprise: detecting that a voltage level from the charge pump satisfies a first trip point criterion; and outputting, to the charge pump during a third time period between the first time period and the second time period and responsive to detecting the first trip point criterion, a third clock signal comprising an intermediate frequency between the higher frequency and the lower frequency. ### Claim 13 (depends on 12) The apparatus of claim 12, further comprising control logic coupled to the voltage-controlled oscillator, wherein the control logic is to perform second operations comprising: determining the first trip point criterion and the second trip point criterion by solving for criteria including: three peak currents from the charge pump during the recovery period are approximately equal; and a combination of the first time period, the second time period, and the third time period are approximately equal to an entirety of the recovery period; and transmitting trim bits to the voltage-controlled oscillator indicative of the first trip point criterion and the second trip point criterion. ### Claim 14 (depends on 8) The apparatus of claim 8, wherein the trip point criterion further comprises a plurality of trip point values, the trip point criterion is a final trip point value of the plurality of trip point values, and wherein the operations further comprise: detecting each of a plurality of voltage levels from the charge pump that satisfy each respective trip point value of the plurality of trip point values; and outputting, to the charge pump sequentially during each of a plurality of time periods in response to detecting a respective voltage level of the plurality of voltage levels, a subsequent clock signal of a plurality of clock signals, which include the first clock signal and the second clock signal, wherein each subsequent clock signal comprises an increasingly higher frequency such that a final clock signal during a final time period of the plurality of time periods has a highest frequency of the plurality of clock signals. ### Claim 15 A method comprising: detecting, using control logic operatively coupled with a clock, that a charge pump has entered a recovery period, the charge pump coupled to one or more wordline of a memory array; and generating, by the control logic, trim bits to trigger frequency stepping within the clock, wherein the frequency stepping comprises: outputting, to the charge pump during a first time period of the recovery period, a first clock signal comprising a lower frequency than output during a time period preceding the recovery period; and outputting, to the charge pump during a second time period of the recovery period, a second clock signal comprising a higher frequency than output during the time period preceding the recovery period. ### Claim 16 (depends on 15) The method of claim 15, wherein the first time period is at least a fourth longer than that of the time period preceding the recovery period and the second time period is at least a third shorter than that of the time period preceding the recovery period. ### Claim 17 (depends on 15) The method of claim 15, further comprising, upon exiting the recovery period, causing the clock to output a static clock signal of a frequency that is substantially equal to that output during the time period preceding the recovery period. ### Claim 18 (depends on 15) The method of claim 15, wherein the trim bits cause frequency stepping between the first time period and the second time period to be approximately timed to satisfy criteria comprising: two peak currents from the charge pump during the recovery period are approximately equal; and a combination of the first time period and the second time period are approximately equal to an entirety of the recovery period. ### Claim 19 (depends on 15) The method of claim 15, wherein the frequency stepping further comprises outputting, to the charge pump during a third time period between the first time period and the second time period, a third clock signal comprising an intermediate frequency between the higher frequency and the lower frequency. ### Claim 20 (depends on 15) The method of claim 15, wherein the frequency stepping further comprises outputting, to the charge pump sequentially during each of a plurality of time periods, a subsequent clock signal of a plurality of clock signals, which include the first clock signal and the second clock signal, wherein each subsequent clock signal comprises an increasingly higher frequency such that a final clock signal during a final time period of the plurality of time periods has a highest frequency of the plurality of clock signals.