# US 11,443,711 B2 · Liquid crystal display panel improving flicker problem due to difference of grey voltages and refreshing frequency > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,443,711 B2 - Document ID: US11443711B2 - Status: Granted - Kind: B2 - Application number: 16/759,356 - Filed: 2020-04-15 - Published: 2022-02-10 - Granted: 2022-09-13 - Earliest claimed: 2020-04-01 - Assignees: Tcl China Star Optoelectronics Technology Co., Ltd. - Applicants: TCL China Star Optoelectronics Technology Co., Ltd. - Inventors: Xiang Gao - Web page: https://patentgrep.com/patent/US11443711B2 ## CPC - G09G 3/36: using liquid crystals - G09G 3/3688: {suitable for active matrices only} - G09G 3/3607: {for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels (display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127)} - G09G 5/10: Intensity circuits - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2310/027: Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0242: Compensation of deficiencies in the appearance of colours - G09G 2320/0247: Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes - G09G 2320/0271: Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping - G09G 2320/0666: for control of colour parameters, e.g. colour temperature - G09G 2340/0435: Change or adaptation of the frame rate of the video stream - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A timing controller includes a detecting circuit, a control circuit, and a compensation circuit. The timing controller reads the compensation values according to the variance between refreshing frequencies and compensate the second basic value in the white balance data driving table based on the first basic value accordingly. This could efficiently improve the grey voltage difference between after and before switching the refreshing frequency. This could efficiently improve the flicker issue. ## Claims ### Claim 1 A timing controller, having a white balance data driving table, the timing controller comprising: a detecting circuit, configured to detect and obtain a refreshing frequency according to a frame starting signal of the timing controller; a control circuit, connected to an output end of the detecting circuit, configured to receive the refreshing frequency, buffer a first refreshing frequency corresponding to a previous frame, and output a control command corresponding to a variance between the first refreshing frequency and a second refreshing frequency corresponding to a current frame; and a compensation circuit comprising a register that stores a compensation data table, connected to an output end of the control circuit, configured to read a compensation value corresponding to the variance stored in the compensation data table and a first basic value corresponding to the first refreshing frequency stored in the white balance data driving table to compensate a second basic value corresponding to the second refreshing frequency stored in the white balance data driving table according to the control command; wherein when the variance is zero, the control circuit stop outputting the control command; and when the variance is not zero, the second basic value is a sum of the first basic value and the compensation value. ### Claim 2 (depends on 1) The timing controller of claim 1, wherein the variance is a difference between the second refreshing frequency and the first refreshing frequency; a scale of the variance is corresponding to a scale of the compensation value; when the variance is more than zero, the compensation value is a negative value; and when the variance is less than zero, the compensation value is a positive value. ### Claim 3 (depends on 1) The timing controller of claim 1, wherein the variance is a difference between the second refreshing frequency and the first refreshing frequency; a scale of the variance is corresponding to a scale of the compensation value; when the variance is more than zero, the compensation value is a positive value; and when the variance is less than zero, the compensation value is a negative value. ### Claim 4 (depends on 1) The timing controller of claim 1, wherein when the variance is not zero, the compensation circuit writes a sum of the first basic value and the compensation value into an address corresponding to the second basic value in the write balance data driving table. ### Claim 5 (depends on 1) The timing controller of claim 1, further comprising a white balance processing unit storing the white balance data driving table. ### Claim 6 (depends on 1) The timing controller of claim 1, wherein the control circuit comprises a random access memory, configured to buffering the first refreshing frequency. ### Claim 7 (depends on 1) The timing controller of claim 1, wherein the white balance data driving table comprises a plurality of basic values, configured to adjust a corresponding grey voltage; and the first basic value and the second basic value are both the basic values. ### Claim 8 A method for adjusting a grey voltage of a liquid crystal display (LCD) panel, comprising: obtaining refreshing frequencies of frames of the LCD panel; calculating a variance between a second refreshing frequency corresponding to a current frame and a first refreshing frequency corresponding to a previous frame; and reading a compensation value corresponding to the variance stored in a compensation data table and a first basic value corresponding to the first refreshing frequency stored in a white balance data driving table to compensate a second basic value corresponding to the second refreshing frequency stored in the white balance data driving table according to the variance; wherein when the variance is not zero, the second basic value is a sum of the first basic value and the compensation value; and the first basic value and the second basic value are both configured to adjust a corresponding grey voltage. ### Claim 9 (depends on 8) The method of claim 8, wherein the variance is a difference between the second refreshing frequency and the first refreshing frequency; a scale of the variance is corresponding to a scale of the compensation value; when the variance is more than zero, the compensation value is a negative value; and when the variance is less than zero, the compensation value is a positive value. ### Claim 10 (depends on 8) The method of claim 8, wherein the variance is a difference between the second refreshing frequency and the first refreshing frequency; a scale of the variance is corresponding to a scale of the compensation value; when the variance is more than zero, the compensation value is a positive value; and when the variance is less than zero, the compensation value is a negative value. ### Claim 11 (depends on 8) The method of claim 8, wherein when the variance is not zero, writing a sum of the first basic value and the compensation value into an address corresponding to the second basic value in the write balance data driving table. ### Claim 12 A liquid crystal display (LCD) panel, comprising a timing controller, the timing controller having a white balance data driving table, the timing controller comprising: a detecting circuit, configured to detect and obtain a refreshing frequency according to a frame starting signal of the timing controller; a control circuit, connected to an output end of the detecting circuit, configured to receive the refreshing frequency, buffer a first refreshing frequency corresponding to a previous frame, and output a control command corresponding to a variance between the first refreshing frequency and a second refreshing frequency corresponding to a current frame; and a compensation circuit comprising a register that stores a compensation data table, connected to an output end of the control circuit, configured to read a compensation value corresponding to the variance stored in the compensation data table and a first basic value corresponding to the first refreshing frequency stored in the white balance data driving table to compensate a second basic value corresponding to the second refreshing frequency stored in the white balance data driving table according to the control command; wherein when the variance is zero, the control circuit stop outputting the control command; and when the variance is not zero, the second basic value is a sum of the first basic value and the compensation value. ### Claim 13 (depends on 12) The LCD of claim 12, wherein the white balance data driving table comprises a plurality of basic values configured to adjust a corresponding grey voltage. ### Claim 14 (depends on 13) The LCD of claim 13, wherein the variance is a difference between the second refreshing frequency and the first refreshing frequency; a scale of the variance is corresponding to a scale of the compensation value; when the variance is more than zero, the compensation value is a negative value; and when the variance is less than zero, the compensation value is a positive value. ### Claim 15 (depends on 13) The LCD of claim 13, wherein the variance is a difference between the second refreshing frequency and the first refreshing frequency; a scale of the variance is corresponding to a scale of the compensation value; when the variance is more than zero, the compensation value is a positive value; and when the variance is less than zero, the compensation value is a negative value. ### Claim 16 (depends on 13) The LCD of claim 13, wherein when the variance is not zero, the compensation circuit writes a sum of the first basic value and the compensation value into an address corresponding to the second basic value in the write balance data driving table. ### Claim 17 (depends on 13) The LCD of claim 13, wherein the timing controller further comprises a white balance processing unit storing the white balance data driving table. ### Claim 18 (depends on 13) The LCD of claim 13, wherein the control circuit comprises a random access memory, configured to buffering the first refreshing frequency.