# US 11,443,095 B2 · Hotspot avoidance method for manufacturing integrated circuits

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- Number: US 11,443,095 B2
- Document ID: US11443095B2
- Status: Granted
- Kind: B2
- Application number: 16/926,026
- Filed: 2020-07-10
- Published: 2022-01-13
- Granted: 2022-09-13
- Earliest claimed: 2020-07-10
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: I-Shuo Liu; Chih-Chun Hsia; Hsin Ting Chou; Kuanhua Su; William Weilun Hong; Chih Hung Chen; Kei-Wei Chen
- Web page: https://patentgrep.com/patent/US11443095B2

## CPC

- G05B 19/41875: {characterised by quality surveillance of production}
- G06F 30/392: Floor-planning or layout, e.g. partitioning or placement
- G06T 7/001: {using an image reference approach}
- H10P 52/403: {of conductive or resistive materials}
- H10P 74/23: {characterised by multiple measurements, corrections, marking or sorting processes}
- G06F 2111/20: Configuration CAD, e.g. designing by assembling or positioning modules selected from libraries of predesigned modules
- G06T 2207/20021: Dividing image into blocks, subimages or windows
- G06T 2207/30148: Semiconductor; IC; Wafer
- G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.

## Claims

### Claim 1

A method comprising:
cropping a plurality of images from a layout of an integrated circuit;
generating a first plurality of hash values, each from one of the plurality of images, wherein each of the first plurality of hash values comprises a series of digits and letters;
loading a second plurality of hash values stored in a hotspot library;
comparing each of the first plurality of hash values with each of the second plurality of hash values, wherein the comparing comprises calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values;
comparing the similarity value with a pre-determined threshold similarity value; and
in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result, wherein the position is the position of the corresponding image in the layout.

### Claim 2 (depends on 1)

The method of claim 1, wherein the plurality of images form an array, and the position comprises a row number and a column number of the corresponding image in the array.

### Claim 3 (depends on 1)

The method of claim 1 further comprising:
manufacturing the integrated circuit on a wafer, wherein the manufacturing comprises performing a chemical mechanical polish process on the wafer; and
finding hotspots from the position, wherein the hotspots are defects in the wafer as a result of the chemical mechanical polish process.

### Claim 4 (depends on 1)

The method of claim 1, wherein the cropping the plurality of images comprises dividing the layout into an array of images, and cropping each of the plurality of images in the array.

### Claim 5 (depends on 1)

The method of claim 1, wherein the pre-determined threshold similarity value is 0.9, and wherein at least one of similarity values of the plurality of hash values is not equal to zero and not equal to 1.0, wherein a similarity value of zero represents totally different between hash values, and a similarity value of 1.0 represents two identical hash values.

### Claim 6 (depends on 1)

The method of claim 1 further comprising:
cropping an additional plurality of images from an additional layout of an additional integrated circuit;
generating a third plurality of hash values, each from one of the additional plurality of images;
comparing each of the third plurality of hash values with all hash values stored in the hotspot library to find a group of hash values similar to the third plurality of hash values; and
ranking similarity values of the group of hash values.

### Claim 7 (depends on 6)

The method of claim 6 further comprising selecting a recipe associated with one of the group of hash values.

### Claim 8

A method comprising:
cropping a plurality of images from a layout of an integrated circuit, wherein the cropping comprises:
dividing the layout of the integrated circuit into an array of rectangular regions, each being one of the plurality of images;
generating a plurality of hash values, each from one of the array of rectangular regions;
searching from a hotspot library to find similar hash values that are similar to the plurality of hash values, wherein the hotspot library stores hash values indexed to images that have hotspots; and
marking positions of some of the plurality of images that are associated with the similar hash values on the layout of the integrated circuit.

### Claim 9 (depends on 8)

The method of claim 8 further comprising:
implementing the layout of the integrated circuit on a wafer, wherein the implementing comprises performing a chemical mechanical polish process on the wafer using a recipe; and
inspecting the positions on the wafer to determine hotspots at the positions.

### Claim 10 (depends on 9)

The method of claim 9 further comprising determining the recipe based on the similar hash values that have been found.

### Claim 11 (depends on 10)

The method of claim 10, wherein the similar hash values are associated with a plurality of recipes in the hotspot library, and wherein the recipe is selected from the plurality of recipes.

### Claim 12 (depends on 9)

The method of claim 9, wherein the recipe comprises a first duration and a flow rate of a slurry used in the chemical mechanical polish process, and a second duration and a magnitude of each of a dressing and a down force used in the chemical mechanical polish process.

### Claim 13 (depends on 8)

The method of claim 8, wherein neighboring ones of the array of rectangular regions are in physical contact with each other.

### Claim 14 (depends on 8)

The method of claim 8, wherein the hotspot library comprises a plurality of entries, each comprises a hash value, an image, a recipe, and a topology information.

### Claim 15 (depends on 14)

The method of claim 14, wherein the hotspot library is indexed by hash values.

### Claim 16

A method comprising:
finding a hotspot from a layout image of an integrated circuit;
searching for a polishing recipe from a library stored in a tangible media, the library comprising an entry, and the entry comprising:
a hash value, wherein the hash value comprises a series of digits and letters;
an image associated with the hash value, wherein the image comprises the hotspot;
the polishing recipe configured to reduce the hotspot; and
a topology information of the hotspot; and
using the polishing recipe to perform a polishing process on a wafer, wherein the wafer comprises the integrated circuit formed therein.

### Claim 17 (depends on 16)

The method of claim 16 further comprising:
after the polishing process, inspecting the wafer; and
updating the polishing recipe based on an inspection result of the hotspot.

### Claim 18 (depends on 17)

The method of claim 17 further comprising using the updated polishing recipe to polish an additional wafer, wherein the additional wafer comprises the integrated circuit formed therein.

### Claim 19 (depends on 16)

The method of claim 16, wherein the hotspot comprises an expected recess or an expected bump in the wafer.

### Claim 20 (depends on 16)

The method of claim 16, wherein the polishing recipe comprises a process condition for polishing the wafer, and the process condition is selected from the group consisting of a slurry flow of a slurry, a down force, a polishing head rotation speed, and combinations thereof.
