# US 11,442,883 B2 · Electronic device, determine a setting of a host device for communication in a subsequent phase

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- Number: US 11,442,883 B2
- Document ID: US11442883B2
- Status: Granted
- Kind: B2
- Application number: 17/120,559
- Filed: 2020-12-14
- Published: 2021-12-16
- Granted: 2022-09-13
- Earliest claimed: 2020-06-10
- Assignees: Kioxia Corporation
- Applicants: Kioxia Corporation
- Inventors: Akinori Bito
- Web page: https://patentgrep.com/patent/US11442883B2

## CPC

- G06F 13/4221: {being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus}
- G06F 13/387: {for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system}
- G06F 13/4059: {where the synchronisation uses buffers, e.g. for speed matching between buses}
- H04L 25/0272: {Arrangements for coupling to multiple lines, e.g. for differential transmission}
- H04L 25/03343: {Arrangements at the transmitter end}
- H04L 25/03885: {adaptive}
- G06F 2213/0026: PCI express
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

According to one embodiment, in a first state, a control circuit determines, based on first information and second information, information on a request that includes a setting of a transmission circuit of a host to be set as an initial setting in a second state. The first state is a state of communicating with a host at a first communication speed conforming to a first specification. The second state is a state of communicating with the host at a second communication speed conforming to a second specification. The second communication speed is different from the first communication speed. The first information is information on a request of a setting of the transmission circuit of the host. The second information is information on a quality of a signal received by a reception circuit, which has been transmitted from the transmission circuit of the host.

## Claims

### Claim 1

An electronic device, comprising:
a reception circuit configured to receive data from a host through an interface;
a transmission circuit configured to transmit data to the host through the interface; and
a control circuit configured to:
execute a link equalization sequence between the host and the electronic device at a first communication speed and a second communication speed, the first communication speed conforming to a first specification, the second communication speed being different from the first communication speed and conforming to a second specification, the link equalization sequence including at least a first phase and a second phase, the first phase being a part of the link equalization sequence in which the control circuit adjusts a setting of the reception circuit without requesting the host to adjust a setting of a transmission circuit of the host, the second phase being another part of the link equalization sequence in which the control circuit adjusts the setting of the reception circuit while requesting the host to adjust the setting of the transmission circuit of the host,
in a first state in which the second phase of the link equalization sequence at the first communication speed is executed, determine, based on first information and second information, information on a first request that includes the setting of the transmission circuit of the host to be set as an initial setting in a second state in which the first phase of the link equalization sequence at the second communication speed is executed,
the first information including information on a second request of the setting of the transmission circuit of the host,
the second information including information on a quality of a signal received by the reception circuit, the signal having been transmitted from the transmission circuit of the host based on the first information; and
transmit the determined information from the transmission circuit to the host.

### Claim 2 (depends on 1)

The electronic device of claim 1, wherein the control circuit is further configured to execute the determination when a state of the reception circuit shifts from the first state to the second state.

### Claim 3 (depends on 1)

The electronic device of claim 1, wherein:
the first specification is a third generation PCI Express specification; and
the second specification is a fourth generation PCI Express specification.

### Claim 4 (depends on 3)

The electronic device of claim 3, wherein the transmission circuit is further configured to transmit the determined information by using an ordered set of 8 GT EQ TS2.

### Claim 5 (depends on 4)

The electronic device of claim 4, wherein the transmission circuit is further configured to transmit the determined information in the first state.

### Claim 6 (depends on 4)

The electronic device of claim 4, wherein:
the first information includes a TxEQ value at the transmission circuit of the host determined during the link equalization sequence in the third generation PCI Express specification; and
the second information includes an RxEQ code value on a quality of the signal received by the reception circuit.

### Claim 7 (depends on 1)

The electronic device of claim 1, wherein the control circuit is further configured to determine the information by:
requesting a plurality of the settings of the transmission circuit of the host;
selecting, for each of the plurality of the settings of the transmission circuit of the host, one of a plurality of the settings of the reception circuit; and
determining a combination of one of the settings of the transmission circuit of the host and one of the settings of the reception circuit that achieves a best quality of the signal among combinations of the plurality of the settings of the transmission circuit of the host and the plurality of the settings of the reception circuit.

### Claim 8 (depends on 1)

The electronic device of claim 1, wherein the electronic device is a storage device.

### Claim 9

An information processing system, comprising:
a storage device;
a host configured to communicate with the storage device; and
an interface connecting the storage device and the host, wherein the storage device includes:
a reception circuit configured to receive data from the host through the interface;
a transmission circuit configured to transmit to the host through the interface; and
a control circuit configured to:
execute a link equalization sequence between the host and the storage device at a first communication speed and a second communication speed, the first communication speed conforming to a first specification, the second communication speed being different from the first communication speed and conforming to a second specification, the link equalization sequence including at least a first phase and a second phase, the first phase being a part of the link equalization sequence in which the control circuit adjusts a setting of the reception circuit without requesting the host to adjust a setting of a transmission circuit of the host, the second phase being another part of the link equalization sequence in which the control circuit adjusts the setting of the reception circuit while requesting the host to adjust the setting of the transmission circuit of the host,
in a first state in which the second phase of the link equalization sequence at the first communication speed is executed, determine, based on first information and second information, information on a first request that includes the setting of the transmission circuit of the host to be set as an initial setting in a second state in which the first phase of the link equalization sequence at the second communication speed is executed,
the first information including information on a second request of the setting of the transmission circuit of the host,
the second information including information on a quality of a signal received by the reception circuit, the signal having been transmitted from the transmission circuit of the host based on the first information; and
transmit the determined information from the transmission circuit to the host.

### Claim 10

A method of shifting a storage device including a reception circuit and a transmission circuit from a first state to a second state, the reception circuit configured to receive data from a host through an interface, the transmission circuit configured to transmit data to the host through the interface, the method comprising:
executing a link equalization sequence between the host and the storage device at a first communication speed and a second communication speed, the first communication speed conforming to a first specification, the second communication speed being different from the first communication speed and conforming to a second specification, the link equalization sequence including at least a first phase and a second phase, the first phase being a part of the link equalization sequence in which a setting of the reception circuit is adjusted without requesting the host to adjust a setting of a transmission circuit of the host, the second phase being another part of the link equalization sequence in which the setting of the reception circuit is adjusted while requesting the host to adjust the setting of the transmission circuit of the host in the first state in which the second phase of the link equalization sequence at the first communication speed is executed, determining, based on first information and second information, information on a first request that includes the setting of the transmission circuit of the host to be set as an initial setting in the second state in which the first phase of the link equalization sequence at the second communication speed is executed, the first information including information on a second request of the setting of the transmission circuit of the host, the second information including information on a quality of a signal received by the reception circuit, the signal having been transmitted from the transmission circuit of the host based on the first information and; and
transmitting the determined information from the transmission circuit to the host.

### Claim 11 (depends on 10)

The method of claim 10, wherein the determining step is executed when a state of the reception circuit shifts from the first state to the second state.

### Claim 12 (depends on 10)

The method of claim 10, wherein:
the first specification is a third generation PCI Express specification; and
the second specification is a fourth generation PCI Express specification.

### Claim 13 (depends on 12)

The method of claim 12, wherein the transmitting step comprises transmitting the determined information by using an ordered set of 8 GT EQ TS2.

### Claim 14 (depends on 13)

The method of claim 13, wherein the transmitting step comprises transmitting the determined information in the first state.

### Claim 15 (depends on 13)

The method of claim 13, wherein:
the first information includes a TxEQ value at the transmission circuit of the host determined during the link equalization sequence in the third generation PCI Express specification; and
the second information includes an RxEQ code value on a quality of the signal received by the reception circuit.

### Claim 16 (depends on 10)

The method of claim 10, wherein the determining step further includes:
requesting a plurality of the settings of the transmission circuit of the host;
selecting, for each of the plurality of the settings of the transmission circuit of the host, a plurality of settings of the reception circuit; and
determining a combination of one of the settings of the transmission circuit of the host and one of the settings of the reception circuit that achieves a best quality of the signal among combinations of the plurality of the settings of the transmission circuit of the host and the plurality of the settings of the reception circuit.

### Claim 17 (depends on 10)

The method of claim 10, wherein the storage device further includes a controller and the determining step is executed by the controller.

### Claim 18 (depends on 10)

The method of claim 10, wherein the storage device and the host are connected via the interface.
