# US 11,442,864 B2 · Managing prefetch requests based on stream information for previously recognized streams > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,442,864 B2 - Document ID: US11442864B2 - Status: Granted - Kind: B2 - Application number: 17/346,608 - Filed: 2021-06-14 - Published: 2021-12-30 - Granted: 2022-09-13 - Earliest claimed: 2020-06-29 - Assignees: Marvell Asia Pte Ltd - Applicants: Marvell Asia Pte Ltd - Inventors: Utkarsh Mathur; Harold W. Cain, III - Web page: https://patentgrep.com/patent/US11442864B2 ## CPC - G06F 12/0862: with prefetch - G06F 9/30047: {Prefetch instructions; cache control instructions} - G06F 9/324: {using program counter relative addressing} - G06F 9/3802: {Instruction prefetching} - G06F 9/3818: {Decoding for concurrent execution} - G06F 9/383: {Operand prefetching (cache prefetching G06F12/0862)} - G06F 12/0875: with dedicated cache, e.g. instruction or stack - G06F 2212/1021: Hit rate improvement - G06F 2212/6024: History based prefetching - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Managing prefetch requests associated with memory access requests includes storing stream information associated with multiple streams. At least one stream was recognized based on an initial subset of memory access requests within a previously performed set of related memory access requests and is associated with stream information that includes stream matching information and stream length information. After the previously performed set has ended, a matching memory access request is identified that matches with a corresponding matched stream based at least in part on stream matching information within stream information associated with the matched stream. In response to identifying the matching memory access request, the managing determines whether or not to perform a prefetch request for data at an address related to a data address in the matching memory access request based at least in part on stream length information within the stream information associated with the matched stream. ## Claims ### Claim 1 An integrated circuit comprising: a cache system configured to store copies of data previously retrieved from a memory system; at least one processor core executing instructions in a pipeline, wherein the pipeline includes at least one stage that executes instructions that initiate memory access requests to access data in the memory system using requests to the cache system; and circuitry configured to manage prefetch requests associated with one or more memory access requests, the managing including: storing stream information associated with a plurality of streams, wherein at least one of the streams was recognized based on an initial subset of memory access requests within a previously performed set of related memory access requests and is associated with stream information that includes stream matching information and stream length information, after the previously performed set of related memory access requests has ended, identifying a matching memory access request that matches with a corresponding matched stream in the plurality of streams based at least in part on stream matching information within stream information associated with the matched stream, and in response to identifying the matching memory access request, determining whether or not to perform a prefetch request for data at an address related to a data address in the matching memory access request based at least in part on stream length information within the stream information associated with the matched stream. ### Claim 2 (depends on 1) The integrated circuit of claim 1, wherein the stream matching information depends on: (1) an address of data being requested by a memory access request in the initial subset of memory access requests, and (2) calling context information associated with an instruction that initiated the memory access request in the initial subset of memory access requests. ### Claim 3 (depends on 2) The integrated circuit of claim 2, wherein the pipeline includes at least one stage that issues instructions based on a program counter that identifies addresses of decoded instructions in the memory system. ### Claim 4 (depends on 3) The integrated circuit of claim 3, wherein the calling context information associated with the instruction that initiated the memory access request in the initial subset of memory access requests includes a value of the program counter that corresponds to an address of the instruction that initiated the memory access request in the initial subset of memory access request. ### Claim 5 (depends on 4) The integrated circuit of claim 4, wherein the calling context information associated with the instruction that initiated the memory access request in the initial subset of memory access requests includes status information associated with execution of the instruction that initiated the memory access request in the initial subset of memory access request. ### Claim 6 (depends on 4) The integrated circuit of claim 4, wherein the calling context information associated with the instruction that initiated the memory access request in the initial subset of memory access requests includes branch history information associated with one or more branch instructions that were executed before execution of the instruction that initiated the memory access request in the initial subset of memory access request. ### Claim 7 (depends on 1) The integrated circuit of claim 1, wherein the stream length information depends on a total number of memory access requests within the previously performed set of related memory access requests. ### Claim 8 (depends on 7) The integrated circuit of claim 7, wherein determining whether or not to perform a prefetch request for data at an address related to a data address in the matching memory access request further includes comparing a number of memory access requests in a current instance of the matched stream to a first stored threshold value if the stream length information indicates a previous instance of the matched stream had a length shorter than a second stored threshold value. ### Claim 9 (depends on 8) The integrated circuit of claim 8, wherein the second stored threshold value changes dynamically in response to total numbers of memory access requests within multiple previous instances of the matched stream. ### Claim 10 (depends on 8) The integrated circuit of claim 8, wherein the first stored threshold is based at least in part on a lookahead value associated with one or more of the prefetch requests. ### Claim 11 (depends on 8) The integrated circuit of claim 8, wherein different ones of the plurality of streams are associated with different values of the second stored threshold value. ### Claim 12 (depends on 8) The integrated circuit of claim 8, wherein different ones of the plurality of streams are associated with the same value of the second stored threshold value. ### Claim 13 A method comprising: storing copies of data previously retrieved from a memory system; executing instructions in a pipeline, wherein the pipeline includes at least one stage that executes instructions that initiate memory access requests to access data in the memory system using requests to the stored copies; and managing prefetch requests associated with one or more memory access requests, the managing including: storing stream information associated with a plurality of streams, wherein at least one of the streams was recognized based on an initial subset of memory access requests within a previously performed set of related memory access requests and is associated with stream information that includes stream matching information and stream length information, after the previously performed set of related memory access requests has ended, identifying a matching memory access request that matches with a corresponding matched stream in the plurality of streams based at least in part on stream matching information within stream information associated with the matched stream, and in response to identifying the matching memory access request, determining whether or not to perform a prefetch request for data at an address related to a data address in the matching memory access request based at least in part on stream length information within the stream information associated with the matched stream. ### Claim 14 (depends on 13) The method of claim 13, wherein the stream matching information depends on: (1) an address of data being requested by a memory access request in the initial subset of memory access requests, and (2) calling context information associated with an instruction that initiated the memory access request in the initial subset of memory access requests. ### Claim 15 (depends on 14) The method of claim 14, wherein the pipeline includes at least one stage that issues instructions based on a program counter that identifies addresses of decoded instructions in the memory system. ### Claim 16 (depends on 15) The method of claim 15, wherein the calling context information associated with the instruction that initiated the memory access request in the initial subset of memory access requests includes a value of the program counter that corresponds to an address of the instruction that initiated the memory access request in the initial subset of memory access request. ### Claim 17 (depends on 16) The method of claim 16, wherein the calling context information associated with the instruction that initiated the memory access request in the initial subset of memory access requests includes branch history information associated with one or more branch instructions that were executed before execution of the instruction that initiated the memory access request in the initial subset of memory access request. ### Claim 18 (depends on 13) The method of claim 13, wherein the stream length information depends on a total number of memory access requests within the previously performed set of related memory access requests. ### Claim 19 (depends on 18) The method of claim 18, wherein determining whether or not to perform a prefetch request for data at an address related to a data address in the matching memory access request further includes comparing a number of memory access requests in a current instance of the matched stream to a first stored threshold value if the stream length information indicates a previous instance of the matched stream had a length shorter than a second stored threshold value. ### Claim 20 An apparatus comprising: means for storing copies of data previously retrieved from a memory system; means for executing instructions in a pipeline, wherein the pipeline includes at least one stage that executes instructions that initiate memory access requests to access data in the memory system using requests to the stored copies; and means for managing prefetch requests associated with one or more memory access requests, the managing including: storing stream information associated with a plurality of streams, wherein at least one of the streams was recognized based on an initial subset of memory access requests within a previously performed set of related memory access requests and is associated with stream information that includes stream matching information and stream length information, after the previously performed set of related memory access requests has ended, identifying a matching memory access request that matches with a corresponding matched stream in the plurality of streams based at least in part on stream matching information within stream information associated with the matched stream, and in response to identifying the matching memory access request, determining whether or not to perform a prefetch request for data at an address related to a data address in the matching memory access request based at least in part on stream length information within the stream information associated with the matched stream.