# US 11,442,733 B2 · Embedded computation instruction performance profiling > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,442,733 B2 - Document ID: US11442733B2 - Status: Granted - Kind: B2 - Application number: 17/162,957 - Filed: 2021-01-29 - Published: 2022-08-04 - Granted: 2022-09-13 - Earliest claimed: 2021-01-29 - Assignees: Seagate Technology LLC - Applicants: Seagate Technology LLC - Inventors: Marc Tim Jones - Web page: https://patentgrep.com/patent/US11442733B2 ## CPC - G06F 9/30145: {Instruction analysis, e.g. decoding, instruction word fields} - G06F 9/321: {Program or instruction counter, e.g. incrementing} - G06F 9/4837: {time dependent} - G06F 11/3034: {where the computing system component is a storage system, e.g. DASD based or network based (digital input from or digital output to record carriers G06F3/06; digital recording or reproducing G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097)} - G06F 11/3409: {for performance assessment} - G06F 11/3476: {Data logging (G06F11/14, G06F11/2205 take precedence)} - G06F 13/4221: {being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus} - G06F 11/3624: {by performing operations on the source code, e.g. via a compiler} - G06F 2213/0026: PCI express - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract The technology disclosed herein pertains to a system and method for profiling performance of an embedded computation instruction set (CIS), the method including receiving a profiling component to a computational storage device (CSD), the profiling component being configured to measure one or more execution parameters of a computational instruction set (CIS), executing the CIS at a program slot in a computational storage processor of the CSD, monitoring the execution of the CIS to generate a log of the execution parameters of the CIS, and communicating the log to a host in response to receiving a get-log page command. ## Claims ### Claim 1 A method, comprising: receiving a computational instruction set (CIS) at a computational storage device (CSD) having a profiler including a profiling component configured to measure one or more execution parameters of the CIS; executing the CIS at a program slot in a computational storage processor of the CSD; monitoring the execution of the CIS by the profiling component of the profiler to generate a log of the execution parameters of the CIS; counting executed segments of the CIS to provide trace information; providing access to the log and the trace information via at least one of communicating the log to a host in response to receiving a get-log page command and by providing the host access to the log via a peripheral component interconnect express (PCIe) interface; and optimizing the CIS using the one or more execution parameters of CIS and the trace information before generating a native instruction set based on the CIS. ### Claim 2 (depends on 1) The method of claim 1, wherein the CIS is an enhanced Berkeley Packet Filter (eBPF) instruction set. ### Claim 3 (depends on 1) The method of claim 1, further comprising enabling CIS profiling using the profiling component in response to receiving a non-volatile memory express (NVMe) set feature command from a host. ### Claim 4 (depends on 1) The method of claim 1, further comprising translating the CIS into a native instruction set before executing the CIS. ### Claim 5 (depends on 4) The method of claim 4, wherein the native instruction set is at least one of an advanced risc machines (ARM) instruction set and an RISC instruction set. ### Claim 6 (depends on 1) The method of claim 1, wherein the execution parameters include at least one of (a) total execution time of the CIS, (b) number of times each instruction of the CIS is executed, (c) percentage taken for every branch in the CIS, (d) number of dynamic random access memory (DRAM) memory accessed, and (e) cache utilization ratio. ### Claim 7 A system, comprising: a storage device; a non-volatile memory express (NVMe) interface to communicate with a host; and a computation system controller (CSC) to store one or more computer program instructions executable on a processor, the computer program instructions comprising: receiving a computational instruction set (CIS) at a computational storage device (CSD) having a profiler including a profiling component configured to measure one or more execution parameters of the CIS; executing the CIS at a program slot in a computational storage processor of the CSD; monitoring the execution of the CIS by the profiling component of the profiler to generate a log of the execution parameters of the CIS; counting executed segments of the CIS to provide trace information; providing access to the log and the trace information via at least one of communicating the log to a host in response to receiving a get-log page command and by providing the host access to the log via a peripheral component interconnect express (PCIe) interface; and optimizing the CIS using the one or more execution parameters of CIS and the trace information before generating a native instruction set based on the CIS. ### Claim 8 (depends on 7) The system of claim 7, wherein the CIS is an enhanced Berkeley Packet Filter (eBPF) instruction set. ### Claim 9 (depends on 7) The system of claim 7, further comprising enabling CIS profiling using the profiling component in response to receiving an NVMe set feature command from a host. ### Claim 10 (depends on 7) The system of claim 7, wherein the computer program instructions further comprising translating the CIS into a native instruction set before executing the CIS. ### Claim 11 (depends on 10) The system of claim 10, wherein the native instruction set is at least one of an advanced risc machines (ARM) instruction set and an RISC instruction set. ### Claim 12 (depends on 7) The system of claim 7, wherein the execution parameters include at least one of (a) total execution time of the CIS, (b) number of times each instruction of the CIS is executed, (c) percentage taken for every branch in the CIS, (d) number of dynamic random access memory (DRAM) memory accessed. ### Claim 13 One or more tangible non-transitory computer-readable storage media encoding computer-executable instructions for executing on a computer system a computer process, the computer process comprising: receiving a computational instruction set (CIS) at a computational storage device (CSD) having a profiler including a profiling component being configured to measure one or more execution parameters of the CIS; executing the CIS at a program slot in a computational storage processor of the CSD; monitoring the execution of the CIS by the profiling component of the profiler to generate a log of the execution parameters of the CIS; counting executed segments of the CIS to provide trace information; providing access to the log and the trace information via at least one of communicating the log to a host in response to receiving a get-log page command and by providing the host access to the log via a peripheral component interconnect express (PCIe) interface; and optimizing the CIS using the one or more execution parameters of CIS and the trace information before generating a native instruction set based on the CIS. ### Claim 14 (depends on 13) The one or more non-transitory computer-readable storage media of claim 13, wherein the CIS is an enhanced Berkeley Packet Filter (eBPF) instruction set. ### Claim 15 (depends on 13) The one or more non-transitory computer-readable storage media of claim 13, wherein the computer process further comprising enabling CIS profiling using the profiling component in response to receiving a non-volatile memory express (NVMe) set feature command from a host. ### Claim 16 (depends on 13) The one or more non-transitory computer-readable storage media of claim 13, wherein the computer process further comprising translating the CIS into a native instruction set before executing the CIS. ### Claim 17 (depends on 16) The one or more non-transitory computer-readable storage media of claim 16, wherein the native instruction set is at least one of an advanced risc machines (ARM) instruction set and an RISC instruction set. ### Claim 18 (depends on 13) The one or more non-transitory computer-readable storage media of claim 13, wherein the execution parameters include at least one of (a) total execution time of the CIS, (b) number of times each instruction of the CIS is executed, (c) percentage taken for every branch in the CIS, (d) number of dynamic random access memory (DRAM) memory accessed, and (e) cache utilization ratio.