# US 11,442,726 B1 · Vector pack and unpack instructions > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,442,726 B1 - Document ID: US11442726B1 - Status: Granted - Kind: B1 - Application number: 17/186,756 - Filed: 2021-02-26 - Published: 2022-09-01 - Granted: 2022-09-13 - Earliest claimed: 2021-02-26 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Eric Mark Schwarz; Timothy Slegel; Jonathan D. Bradbury; Michael Klein; Reid Copeland; Xin Guo - Web page: https://patentgrep.com/patent/US11442726B1 ## CPC - G06F 9/30025: {Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion} - G06F 9/30036: {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations} - G06F 9/30038: {using a mask} - G06F 9/3004: {to perform operations on memory} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Vector pack and unpack instructions are described. An instruction to perform a conversion between one decimal format and another decimal format is executed, in which the one decimal format or the other decimal format is a zoned decimal format. The executing includes obtaining a value from at least one register specified using the instruction. At least a portion of the value is converted from the one decimal format to the other decimal format different from the one decimal format to provide a converted result. A result obtained from the converted result is written into a single register specified using the instruction. ## Claims ### Claim 1 A computer program product for facilitating processing within a computing environment, the computer program product comprising: one or more computer readable storage media and program instructions collectively stored on the one or more computer readable storage media to perform a method comprising: executing an instruction to perform a conversion between decimal formats, wherein one of the decimal formats is a zoned decimal format, and wherein the executing includes: obtaining a value from at least one register specified using the instruction; converting at least a portion of the value from one decimal format to another decimal format different from the one decimal format to provide a converted result; writing a result obtained from the converted result into a single register specified using the instruction; obtaining, using a field of the instruction, at least one validity control, the at least one validity control to determine whether one or more particular validity checks relating to the instruction are to be performed, the at least one validity control including a digit validation control and a sign validation control; and performing, as part of executing the instruction, the one or more particular validity checks based on the at least one validity control indicating the one or more particular validity checks are to be performed, wherein the performing the one or more particular validity checks includes checking a sign code of a source value of the instruction for a general operand data exception based on the digit validation control being set to a selected value to indicate validity checking and the sign validation control being set to a chosen value to indicate validity checking. ### Claim 2 (depends on 1) The computer program product of claim 1, wherein the one decimal format is the zoned decimal format, and the other decimal format is a packed decimal format. ### Claim 3 (depends on 2) The computer program product of claim 2, wherein the obtaining the value comprises: obtaining a first value from a first vector register specified using at least one field of the instruction; obtaining a second value from a second vector register specified using at least one field of the instruction; and concatenating the first value and the second value to obtain the value. ### Claim 4 (depends on 2) The computer program product of claim 2, wherein the writing comprises: determining a number of digits of the converted result to be written as the result; selecting the determined number of digits of the converted result to be written as the result; and writing the selected determined number of digits into the single register. ### Claim 5 (depends on 4) The computer program product of claim 4, wherein the determining the number of digits comprises checking a control specified using the instruction, and the single register is a single vector register. ### Claim 6 (depends on 2) The computer program product of claim 2, wherein based on the digit validation control being set to a value different from the selected value indicating validity checking for the general operand data exception, the sign code of the source vector is checked for validity for setting a condition code resulting from execution of the instruction. ### Claim 7 (depends on 2) The computer program product of claim 2, wherein based on the sign validation control being set to a value different from the chosen value indicating validity checking for the general operand data exception, the sign code of the source vector is checked for validity for setting a condition code resulting from execution of the instruction. ### Claim 8 (depends on 1) The computer program product of claim 1, wherein the one decimal format is a packed decimal format and wherein the other decimal format is the zoned decimal format. ### Claim 9 (depends on 8) The computer program product of claim 8, wherein the converting at least a portion of the value comprises converting selected digits of the value to obtain the converted result. ### Claim 10 (depends on 9) The computer program product of claim 9, wherein the selected digits comprise a leftmost fifteen digits of the value. ### Claim 11 (depends on 9) The computer program product of claim 9, wherein the selected digits comprise a rightmost sixteen digits of the value, and wherein the converting further includes converting a sign of the value. ### Claim 12 (depends on 9) The computer program product of claim 9, wherein the writing comprises writing the converted result to a selected portion of the single register, the single register being a vector register. ### Claim 13 A computer system for facilitating processing within a computing environment, the computer system comprising: a memory; and a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising: executing an instruction to perform a conversion between decimal formats, wherein one of the decimal formats is a zoned decimal format, and wherein the executing includes: obtaining a value from at least one register specified using the instruction; converting at least a portion of the value from one decimal format to another decimal format different from the one decimal format to provide a converted result; writing a result obtained from the converted result into a single register specified using the instruction; obtaining, using a field of the instruction, at least one validity control, the at least one validity control to determine whether one or more particular validity checks relating to the instruction are to be performed, the at least one validity control including a digit validation control and a sign validation control; and performing, as part of executing the instruction, the one or more particular validity checks based on the at least one validity control indicating the one or more particular validity checks are to be performed, wherein the performing the one or more particular validity checks includes checking a sign code of a source value of the instruction for a general operand data exception based on the digit validation control being set to a selected value to indicate validity checking and the sign validation control being set to a chosen value to indicate validity checking. ### Claim 14 (depends on 13) The computer system of claim 13, wherein the one decimal format is the zoned decimal format, and the other decimal format is a packed decimal format. ### Claim 15 (depends on 14) The computer system of claim 14, wherein the obtaining the value comprises: obtaining a first value from a first vector register specified using at least one field of the instruction; obtaining a second value from a second vector register specified using at least one field of the instruction; and concatenating the first value and the second value to obtain the value. ### Claim 16 (depends on 14) The computer system of claim 14, wherein the writing comprises: determining a number of digits of the converted result to be written as the result; selecting the determined number of digits of the converted result to be written as the result; and writing the selected determined number of digits into the single register. ### Claim 17 (depends on 13) The computer system of claim 13, wherein the one decimal format is a packed decimal format and wherein the other decimal format is the zoned decimal format. ### Claim 18 A computer-implemented method of facilitating processing within a computing environment, the computer-implemented method comprising: executing an instruction to perform a conversion between decimal formats, wherein one of the decimal formats is a zoned decimal format, and wherein the executing includes: obtaining a value from at least one register specified using the instruction; converting at least a portion of the value from one decimal format to another decimal format different from the one decimal format to provide a converted result; writing a result obtained from the converted result into a single register specified using the instruction; obtaining, using a field of the instruction, at least one validity control, the at least one validity control to determine whether one or more particular validity checks relating to the instruction are to be performed, the at least one validity control including a digit validation control and a sign validation control; and performing, as part of executing the instruction, the one or more particular validity checks based on the at least one validity control indicating the one or more particular validity checks are to be performed, wherein the performing the one or more particular validity checks includes checking a sign code of a source value of the instruction for a general operand data exception based on the digit validation control being set to a selected value to indicate validity checking and the sign validation control being set to a chosen value to indicate validity checking. ### Claim 19 (depends on 18) The computer-implemented method of claim 18, wherein the one decimal format is the zoned decimal format, and the other decimal format is a packed decimal format. ### Claim 20 (depends on 19) The computer-implemented method of claim 19, wherein the obtaining the value comprises: obtaining a first value from a first vector register specified using at least one field of the instruction; obtaining a second value from a second vector register specified using at least one field of the instruction; and concatenating the first value and the second value to obtain the value. ### Claim 21 (depends on 19) The computer-implemented method of claim 19, wherein the writing comprises: determining a number of digits of the converted result to be written as the result; selecting the determined number of digits of the converted result to be written as the result; and writing the selected determined number of digits into the single register. ### Claim 22 (depends on 18) The computer-implemented method of claim 18, wherein the one decimal format is a packed decimal format and wherein the other decimal format is the zoned decimal format. ### Claim 23 A computer program product for facilitating processing within a computing environment, the computer program product comprising: one or more computer readable storage media and program instructions collectively stored on the one or more computer readable storage media to perform a method comprising: executing a vector unpack zoned high instruction to perform an unpack operation, the unpack operation including a conversion between a signed packed decimal format and a zoned decimal format and validity checking, wherein the executing includes: obtaining a value from at least one register specified using the instruction; converting selected leftmost digits of the value from the signed packed decimal format to the zoned decimal format to provide a converted result; writing a result obtained from the converted result into a single register specified using the instruction; obtaining, using a field of the instruction, a digit validation control and a sign validation control; and performing, as part of executing the vector unpack zoned high instruction, a sign code validity check of an input value of the instruction for a general operand data exception based on the digit validation control being set to a selected value to indicate validity checking and the sign validation control being set to a chosen value to indicate validity checking. ### Claim 24 (depends on 23) The computer program product of claim 23, wherein the selected digits comprise a leftmost fifteen digits of the value. ### Claim 25 A computer program product for facilitating processing within a computing environment, the computer program product comprising: one or more computer readable storage media and program instructions collectively stored on the one or more computer readable storage media to perform a method comprising: executing a vector unpack zoned low instruction to perform an unpack operation, the unpack operation including a conversion between a signed packed decimal format and a zoned decimal format and validity checking, wherein the executing includes: obtaining a value from at least one register specified using the instruction; converting selected rightmost digits of the value from the signed packed decimal format to the zoned decimal format to provide a converted result; writing a result obtained from the converted result into a single register specified using the instruction; obtaining, using a field of the instruction, a digit validation control and a sign validation control; and performing, as part of executing the vector unpack zoned low instruction, a sign code validity check of an input value of the instruction for a general operand data exception based on the digit validation control being set to a selected value to indicate validity checking and the sign validation control being set to a chosen value to indicate validity checking.