# US 11,442,578 B2 · Ratio-metric multi-sensing convertor

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- Number: US 11,442,578 B2
- Document ID: US11442578B2
- Status: Granted
- Kind: B2
- Application number: 17/396,191
- Filed: 2021-08-06
- Published: 2022-03-03
- Granted: 2022-09-13
- Earliest claimed: 2020-08-31
- Assignees: Cypress Semiconductor Corporation
- Applicants: Cypress Semiconductor Corporation
- Inventors: Andriy Maharyta
- Web page: https://patentgrep.com/patent/US11442578B2

## CPC

- G06F 3/0418: {for error correction or compensation, e.g. based on parallax, calibration or alignment}
- G06F 3/041662: {using alternate mutual and self-capacitive scanning}
- G06F 3/044: by capacitive means
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Apparatuses and methods of capacitance-to-digital code conversion are described. One apparatus includes a bridge circuit and a modulator front-end circuit. The bridge circuit includes a first terminal to couple to a reference cell and a second terminal to couple to a sensor cell. The modulator front-end circuit includes a comparator coupled to the bridge circuit, a first modulation capacitor coupled to a first input of the comparator, and a second modulation capacitor coupled to a second input of the comparator. The modulator front-end circuit provides a digital bitstream. A duty cycle of the digital bitstream is representative of a ratio between a capacitance of the sensor cell and a reference capacitance of the reference cell.

## Claims

### Claim 1

A capacitance-to-digital converter comprising:
a bridge circuit comprising a first terminal to couple to a reference cell and a second terminal to couple to a sensor cell; and
a modulator front-end circuit comprising a comparator coupled to the bridge circuit, a first modulation capacitor coupled to a first input of the comparator, and a second modulation capacitor coupled to a second input of the comparator, wherein the modulator front-end circuit is to provide a digital bitstream, wherein a duty cycle of the digital bitstream is representative of a ratio between a capacitance of the sensor cell and a reference capacitance of the reference cell;
wherein the sensor cell comprises a sensor electrode, wherein the modulator front-end circuit further comprises a sequencer to generate a first phase, a second phase, a third phase, and a fourth phase, wherein the capacitance-to-digital converter is configured to:
in the first phase, apply a supply voltage to charge the sensor electrode to a first voltage level;
in the second phase, couple the sensor electrode to the first modulation capacitor to charge the first modulation capacitor;
in the third phase, couple the sensor electrode to a ground potential to ground the sensor electrode; and
in the fourth phase, couple the sensor electrode to the second modulation capacitor to discharge the second modulation capacitor.

### Claim 2 (depends on 1)

The capacitance-to-digital converter of claim 1, wherein the reference cell comprises a reference electrode, wherein the capacitance-to-digital converter is further to:
in the first phase, apply the supply voltage to charge the reference electrode to the first voltage level;
in the second phase, couple the reference electrode to the second modulation capacitor to charge the second modulation capacitor;
in the third phase, couple the reference electrode to the ground potential to ground the reference electrode; and
in the fourth phase, couple the reference electrode to the first modulation capacitor to discharge the first modulation capacitor.

### Claim 3 (depends on 1)

The capacitance-to-digital converter of claim 1, wherein the reference cell comprises a reference electrode, wherein the reference capacitance is a self-capacitance.

### Claim 4 (depends on 1)

The capacitance-to-digital converter of claim 1, wherein the reference cell comprises a first electrode and a second electrode, wherein the reference capacitance is a mutual capacitance.

### Claim 5 (depends on 1)

The capacitance-to-digital converter of claim 1, wherein the bridge circuit further comprises a third terminal to couple to a compensation cell having a compensation capacitance, wherein the ratio is based on the reference capacitance, the capacitance of the sensor cell, and the compensation capacitance.

### Claim 6 (depends on 5)

The capacitance-to-digital converter of claim 5, wherein the compensation cell comprises a compensation electrode, and wherein the capacitance-to-digital converter is further to:
in the first phase, apply the supply voltage to charge the compensation electrode to the first voltage level;
in the second phase, couple the compensation electrode to the second modulation capacitor to charge the second modulation capacitor;
in the third phase, couple the compensation electrode to the ground potential to ground the compensation electrode; and
in the fourth phase, couple the compensation electrode to the first modulation capacitor to discharge the first modulation capacitor.

### Claim 7 (depends on 5)

The capacitance-to-digital converter of claim 5, wherein the duty cycle of the digital bitstream is a ratio between the capacitance of the reference capacitance and a difference of the capacitance of the sensor cell and a capacitance of the compensation cell.

### Claim 8

A method comprising:
in a first phase, applying a supply voltage to charge a sensor electrode of a sensor cell to a first voltage level;
in a second phase, coupling the sensor electrode to a first modulation capacitor to charge the first modulation capacitor, the first modulation capacitor being coupled to a first input of a comparator;
in a third phase, coupling the sensor electrode to a ground potential to ground the sensor electrode; and
in a fourth phase, coupling the sensor electrode to a second modulation capacitor to discharge the second modulation capacitor, the second modulation capacitor being coupled to a second input of the comparator, wherein modulator front-end circuit comprises the first modulation capacitor, the second modulation capacitor, and the comparator, the modulator front-end circuit to provide a digital bitstream, and wherein a duty cycle of the digital bitstream is representative of a ratio between a capacitance of the sensor cell and a reference capacitance of a reference cell.

### Claim 9 (depends on 8)

The method of claim 8, further comprising:
in the first phase, applying the supply voltage to charge a reference electrode of the reference cell to the first voltage level;
in the second phase, coupling the reference electrode to the second modulation capacitor to charge the second modulation capacitor;
in the third phase, coupling the reference electrode to the ground potential to ground the reference electrode; and
in the fourth phase, coupling the reference electrode to the first modulation capacitor to discharge the first modulation capacitor.

### Claim 10 (depends on 9)

The method of claim 9, wherein the reference cell comprises the reference electrode, wherein the reference capacitance is a self-capacitance.

### Claim 11 (depends on 9)

The method of claim 9, wherein the reference cell further comprises the reference electrode and a second reference electrode, wherein the reference capacitance is a mutual capacitance.

### Claim 12 (depends on 9)

The method of claim 9, further comprising:
in the first phase, applying the supply voltage to a compensation electrode of a compensation cell having a compensation capacitance;
in the second phase, coupling the compensation electrode to the second modulation capacitor to charge the second modulation capacitor;
in the third phase, coupling the compensation electrode to the ground potential to ground the compensation electrode; and
in the fourth phase, coupling the compensation electrode to the first modulation capacitor to discharge the first modulation capacitor.

### Claim 13 (depends on 12)

The method of claim 12, wherein the duty cycle of the digital bitstream is a ratio between the capacitance of the reference cell and a difference of the capacitance of the sensor cell and a capacitance of the compensation cell.

### Claim 14

A system comprising:
a reference cell;
a sensor cell; and
a capacitance-to-digital converter comprising:
a bridge circuit comprising a first terminal to couple to a reference cell and a second terminal to couple to a sensor cell; and
a modulator front-end circuit comprising a comparator coupled to the bridge circuit, a first modulation capacitor coupled to a first input of the comparator, and a second modulation capacitor coupled to a second input of the comparator, wherein the modulator front-end circuit is to provide a digital bitstream, wherein a duty cycle of the digital bitstream is representative of a ratio between a capacitance of the sensor cell and a reference capacitance of the reference cell;
wherein the sensor cell comprises a sensor electrode, wherein the modulator front-end circuit further comprises a sequencer to generate a first phase, a second phase, a third phase, and a fourth phase, wherein the capacitance-to-digital converter is configured to:
in the first phase, apply a supply voltage to charge the sensor electrode to a first voltage level;
in the second phase, couple the sensor electrode to the first modulation capacitor to charge the first modulation capacitor;
in the third phase, couple the sensor electrode to a ground potential to ground the sensor electrode; and
in the fourth phase, couple the sensor electrode to the second modulation capacitor to discharge the second modulation capacitor.

### Claim 15 (depends on 14)

The system of claim 14, wherein the reference cell comprises a reference electrode, wherein the reference capacitance is a self-capacitance.

### Claim 16 (depends on 14)

The system of claim 14, wherein the reference cell comprises a first electrode and a second electrode, wherein the reference capacitance is a mutual capacitance.

### Claim 17 (depends on 14)

The system of claim 14, further comprising a compensation cell having a compensation capacitance, wherein the ratio is based on the reference capacitance, the capacitance of the sensor cell, and the compensation capacitance.

### Claim 18 (depends on 14)

The system of claim 14, wherein the sensor cell comprises a sensor electrode and the capacitance of the sensor cell is a self-capacitance.
