# US 11,442,526 B2 · Power management method and system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,442,526 B2 - Document ID: US11442526B2 - Status: Granted - Kind: B2 - Application number: 17/004,461 - Filed: 2020-08-27 - Published: 2020-12-17 - Granted: 2022-09-13 - Earliest claimed: 2016-02-14 - Assignees: Huawei Technologies Co., Ltd. - Applicants: Huawei Technologies Co., Ltd. - Inventors: Binbin Wang; Yumin Wu - Web page: https://patentgrep.com/patent/US11442526B2 ## CPC - G06F 1/3243: {Power saving in microcontroller unit} - G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C) - G06F 1/28: Supervision thereof, e.g. detecting power-supply failure by out of limits supervision - G06F 1/3203: Power management, i.e. event-based initiation of a power-saving mode - G06F 1/3206: Monitoring of events, devices or parameters that trigger a change in power modality - G06F 1/3253: {Power saving in bus} - G06F 1/3287: by switching off individual functional units in the computer system - G06F 1/3293: by switching to a less power-consuming processor, e.g. sub-CPU - G06F 9/4401: Bootstrapping (security arrangements therefor G06F21/57) - G06F 9/4405: {Initialisation of multiprocessor systems} - G06F 1/3209: Monitoring remote activity, e.g. over telephone lines or network connections - G06F 1/3215: Monitoring of peripheral devices - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A power management method to improve a power-on effect of a multi-node system is disclosed. In the power management method provided in the present disclosure, after a power management module delivers a power-on instruction to each node in the multi-node system, a PCH of each node loads a BIOS from a local flash to perform a power-on process. Compared with the prior art in which a PCH of a master node is responsible for loading BIOSs of all nodes in a multi-node system, the method provided in the present disclosure can reduce burden on the PCH of the master node, and accelerate a power-on speed of the system, so that a better power-on effect is achieved. The present disclosure further provides a related multi-node system. ## Claims ### Claim 1 A power management system, comprising a power management module and a plurality of nodes; the power management module being connect to the plurality of nodes; wherein the power management module is configured to send a power-on instruction to the plurality of nodes, wherein the power-on instruction is used to instruct to power on the plurality of nodes; a platform controller hub (PCH) of a first node is configured to power on the first node based on the power-on instruction, a PCH of a second node is configured to power on the second node based on the power-on instruction; and the first node is configured to switch the PCH of the first node to a sleep state after being powered on and the PCH of the second node is configured to manage power of the first node, wherein the first node comprised a flash and wherein the first node is configured to: upload a basic input output system (BIOS) from the flash of the first node based on the power-on instruction to perform a power-on operation. ### Claim 2 (depends on 1) The system of claim 1, wherein the first node is configured to: load the BIOS from the flash of the first node until a local memory has been initialized; and load a BIOS from a flash of a second node continuously after the local memory of the first node has been initialized. ### Claim 3 (depends on 1) The system of claim 1, wherein the plurality of nodes comprises a second node; wherein the second node is configured to send a power-off management instruction to the power management module, the power-off management instruction is used to instruct to power on each of the plurality of nodes; and power off after sending a sleep control signal. ### Claim 4 (depends on 3) The system of claim 3, wherein the power management module is configured to: send the sleep control signal to the plurality of nodes, the sleep control signal is used to indicate the plurality of nodes to power off. ### Claim 5 (depends on 4) The system of claim 4, wherein the second node is configured to: pull down a first sleep control signal of the second node; send the first sleep control signal of the second node that is pulled down to the power management module; and power off the plurality of nodes after the plurality of nodes receive a second sleep control signal, and pull down a sleep control signal of the second node after power-off. ### Claim 6 (depends on 3) The system of claim 3, wherein the first node is configured to: pull down a local sleep control signal by using the PCH after the first node is powered off. ### Claim 7 (depends on 1) The system of claim 1, wherein the first node further comprises a complex programmable logic device (CPLD) and a central processing unit (CPU), wherein the CPLD is configured to activate a Direct Media Interface (DMI) bus between the CPU and the PCH of the first node; the CPU is configured to perform a hot reset operation; and disable the DMI bus between the CPU and the PCH after performing the hot reset operation. ### Claim 8 A node, configured to: receive a power-on instruction from a power management module, wherein the power-on instruction is used to instruct a platform controller hub (PCH) of a first node to power on the first node and to instruct a PCH of a second node to power on the second node; and switch the PCH of the first node to a sleep state after being powered on, wherein the PCH of the second node is configured to manage power of the first node, wherein the node comprised a flash and the node is configured to: upload a basic input output system (BIOS) from the flash of the first node based on the power-on instruction to perform a power-on operation. ### Claim 9 (depends on 8) The node of claim 8, configured to: load the BIOS from the flash of the first node until a local memory has been initialized; and load a BIOS from a flash of a second node continuously after the local memory of the first node has been initialized. ### Claim 10 (depends on 8) The node of claim 8, wherein the node is configured to: receive a sleep control signal from the power management module, the sleep control signal is used to indicate the first node to power off. ### Claim 11 (depends on 10) The node of claim 10, wherein the node is configured to: pull down a local sleep control signal by using the PCH after the first node is powered off. ### Claim 12 (depends on 10) The node of claim 10, wherein the node further comprises a complex programmable logic device (CPLD) and a central processing unit (CPU), wherein the CPLD is configured to activate a Direct Media Interface (DMI) bus between a CPU and the PCH of the first node; the CPU is configured to perform a hot reset operation; and disable the DMI bus between the CPU and the PCH after performing the hot reset operation. ### Claim 13 A non-transitory computer-readable storage medium comprising instructions which, when executed by a computer, cause the computer to carry out operations comprising: receiving a power-on instruction from a power management module, wherein the power-on instruction is used to instruct a platform controller hub (PCH) of a first node to power on the first node and to instruct a PCH of a second node to power on the second node; powering on the first node based on the power-on instruction; and switching the PCH of the first node to a sleep state after being powered on, wherein the PCH of the second node is configured to manage power of the first node; and uploading a basic input output system (BIOS) from a flash of the first node based on the power-on instruction to perform a power-on operation. ### Claim 14 (depends on 13) The non-transitory computer-readable storage medium of claim 13, comprising instructions which, when executed by a computer, cause the computer to carry out operations comprising: loading the BIOS from the flash of the first node until a local memory has been initialized; and loading a BIOS from a flash of a second node continuously after the local memory of the first node has been initialized. ### Claim 15 (depends on 13) The non-transitory computer-readable storage medium of claim 13, comprising instructions which, when executed by a computer, cause the computer to carry out operations comprising: receiving a sleep control signal from the power management module, the sleep control signal is used to indicate the first node to power off. ### Claim 16 (depends on 13) The non-transitory computer-readable storage medium of claim 13, comprising instructions which, when executed by a computer, cause the computer to carry out operations comprising: pulling down a local sleep control signal by using the PCH after the first node is powered off. ### Claim 17 (depends on 13) The non-transitory computer-readable storage medium of claim 13, comprising instructions which, when executed by a computer, cause the computer to carry out operations comprising: activating a Direct Media Interface (DMI) bus between a central processing unit (CPU) and the PCH of the first node; performing a hot reset operation; and disabling the DMI bus between the CPU and the PCH after performing the hot reset operation.