# US 11,442,515 B2 · Electronic device

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- Number: US 11,442,515 B2
- Document ID: US11442515B2
- Status: Granted
- Kind: B2
- Application number: 17/034,722
- Filed: 2020-09-28
- Published: 2021-01-14
- Granted: 2022-09-13
- Earliest claimed: 2016-01-15
- Assignees: Japan Display Inc.
- Applicants: Japan Display Inc.
- Inventors: Akihiro Hanada; Hajime Watakabe; Kazufumi Watabe
- Web page: https://patentgrep.com/patent/US11442515B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C)
- H02J 13/00: Circuit arrangements for providing remote monitoring or remote control of equipment in a power distribution network
- H02J 13/1321: {using a wired telecommunication network or a data transmission bus}
- H04L 41/069: using logs of notifications; Post-processing of notifications
- H04L 47/2416: Real-time traffic
- H04L 67/12: specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/431: {having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10D 86/471: {having different architectures, e.g. having both top-gate and bottom-gate TFTs}
- H04Q 9/02: Automatically-operated arrangements
- H04Q 2209/826: where the data is sent periodically
- H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device}
- H10D 30/6723: {having light shields}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 30/6731: {Top-gate only TFTs}
- H10D 30/6736: {characterised by the shape of gate insulators}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 64/685: {being perpendicular to the channel plane}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D 64/693: {the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials}
- Y02E 60/00: Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y04S 40/124: using wired telecommunication networks or data transmission busses
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- H04Q: SELECTING (switches, relays, selectors H01H; wireless communication networks H04W)
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y04S: SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS

## Abstract

According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

## Claims

### Claim 1

An electronic device comprising:
a substrate;
a silicon nitride film formed on the substrate;
a first silicon oxide film formed on the silicon nitride film;
a block insulating layer including oxide on the first silicon oxide film;
a metal oxide semiconductor layer formed on the block insulating layer;
a second silicon oxide film covering the metal oxide semiconductor layer; and
a gate electrode formed between the substrate and the silicon nitride film, and facing the metal oxide semiconductor layer, wherein
a thickness of the second silicon oxide film is larger than a thickness of the first silicon oxide film, and the thickness of the second silicon oxide film is larger than a thickness of the silicon nitride film, and the block insulating layer has an even thickness,
the silicon nitride film, the first silicon oxide film, the block insulating layer, the metal oxide semiconductor layer, and the second silicon oxide film are laminated on the substrate in this order,
the gate electrode is entirely covered by the silicon nitride film.

### Claim 2 (depends on 1)

The electronic device according to claim 1, wherein the oxide is metal oxide.

### Claim 3 (depends on 2)

The electronic device according to claim 2, wherein the metal oxide is one of AlOx, TiOx, ZrOx, TaOx, or HfOx.

### Claim 4 (depends on 1)

The electronic device according to claim 1, wherein the oxide is silicon oxide.