# US 11,442,496 B2 · Fieldbus transmitter interface, fieldbus receiver interface and system with both interfaces and coding method for a fieldbus transmitter interface > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,442,496 B2 - Document ID: US11442496B2 - Status: Granted - Kind: B2 - Application number: 17/216,841 - Filed: 2021-03-30 - Published: 2021-10-07 - Granted: 2022-09-13 - Earliest claimed: 2020-04-02 - Assignees: Endress+Hauser Conducta GmbH+Co. KG - Applicants: Endress+Hauser Conducta GmbH+Co. KG - Inventors: Björn Haase - Web page: https://patentgrep.com/patent/US11442496B2 ## CPC - G06F 1/10: Distribution of clock signals {, e.g. skew} - G06F 13/28: using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) - G06F 13/4213: {with asynchronous protocol} - H04L 12/40: Bus networks - H04L 67/12: specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks - H04L 25/4902: {Pulse width modulation; Pulse position modulation} - H04L 2012/4026: {Bus for use in automation systems} - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - Y02P 90/02: Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS] - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE - Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS ## Abstract Disclosed is a fieldbus transmitter interface for a field device or a control center. The fieldbus transmitter interface comprises a computing unit, a digital gate, an analog transmission filter and a transmitter interface output. The computing unit is connected to the digital gate, and the digital gate is connected to the analog transmission filter, and the analog transmission filter is connected to the transmitter interface output. The computing unit comprises a pulse width modulator and a pulse width modulator clock that is suitable for generating a secondary signal coded by a duty cycle which is varied over time by the pulse width modulator clock. The pulse width modulator superimposes the secondary signal with a carrier signal, so that a digital transmission signal with a frequency of less than 150 kHz is generated. The digital gate and the analog transmit filter convert the digital transmission signal into an analog loop signal. ## Claims ### Claim 1 A fieldbus transmitter interface for a field device or a control center, the fieldbus transmitter interface comprising: a computing unit; a digital gate; an analog transmission filter; and a transmitter interface output, wherein the digital gate is connected to the analog transmission filter and the analog transmission filter is connected to the transmitter interface output, wherein the computing unit includes a pulse width modulator and a pulse width modulator clock that is suitable for generating a secondary signal that is coded by means of a duty cycle that is varied over time by the pulse width modulator clock, and wherein the pulse width modulator is suitable for superimposing the secondary signal with a carrier signal so that a digital transmission signal with a frequency of less than 150 kHz is generated, wherein the digital gate and the analog transmission filter are suitable for converting the digital transmission signal into an analog loop signal, and wherein the transmitter interface output is suitable for being connected to a remote station for transmitting the analog loop signal to the remote station. ### Claim 2 (depends on 1) The fieldbus transmitter interface according to claim 1, further comprising: a first galvanic barrier arranged between the computing unit and the analog transmission filter. ### Claim 3 (depends on 1) The fieldbus transmitter interface according to claim 1, wherein the computing unit includes a duty cycle modulator for rounding an input value wherein the duty cycle modulator is suitable for converting the input value into duty cycle setpoint values rounded for respective periods of the digital transmission signal and for transmitting the rounded duty cycle setpoint values to the pulse width modulator. ### Claim 4 (depends on 3) The fieldbus transmitter interface according to claim 3, wherein the duty cycle modulator is a multi-bit sigma-delta modulator. ### Claim 5 (depends on 3) The fieldbus transmitter interface according to claim 3, wherein the computing unit determines an unrounded input value for the duty cycle modulator based on a direct current voltage setpoint value and a sine setpoint value. ### Claim 6 (depends on 5) The fieldbus transmitter interface according to claim 5, wherein the computing unit further includes a slew rate limiter suitable for limiting a change in the direct current voltage setpoint value. ### Claim 7 (depends on 1) The fieldbus transmitter interface according to claim 1, wherein the pulse-width modulator codes the secondary signal at a baud rate of 1200 Hz, wherein the period duration of the secondary signal is constant and the frequency of the digital transmission signal is an integer multiple of the baud rate. ### Claim 8 (depends on 1) The fieldbus transmitter interface according to claim 1, wherein the computing unit further includes a sine pre-distortion filter suitable for realizing a frequency-dependent phase shift of the digital transmission signal to compensate a phase shift of the analog transmission filter. ### Claim 9 (depends on 1) The fieldbus transmitter interface according to claim 1, wherein the computing unit further includes a sine generator suitable for outputting a sine value from a phase input value and forwarding it to a duty cycle modulator so that the sine value includes a pre-distortions suitable for compensating for a predetermined frequency-dependent phase shift of the analog transmission filter. ### Claim 10 (depends on 1) The fieldbus transmitter interface according to claim 1, wherein the computing unit further includes a memory and a direct memory access controller, wherein a duty cycle sequence is stored in the memory, and the direct memory access controller is suitable for controlling the pulse width modulator with the duty cycle sequence such that it adjusts the duty cycle as a function of the duty cycle sequence. ### Claim 11 (depends on 1) The fieldbus transmitter interface according to claim 1, wherein the analog transmission filter is at least third order, is optimized for low phase shift in a useful frequency band, and has a Bessel or Butterworth characteristic or a plateau characteristic. ### Claim 12 A fieldbus receiver interface for processing a primary signal, comprising: a receiver interface input; a first analog pre-filter; a second analog pre-filter; and a computing unit including an analog digital converter, a direct current deduction filter, and a quadrature demodulator. ### Claim 13 (depends on 12) The fieldbus receiver interface according to claim 12, further comprising: a galvanic barrier arranged between the receiver interface input and the computing unit and arranged between the first analog pre-filter and the second analog pre-filter. ### Claim 14 (depends on 13) The fieldbus receiver interface according to claim 13, wherein the transmission of the primary signal takes place with digital coding via the galvanic barrier. ### Claim 15 (depends on 12) The fieldbus receiver interface according to claim 12, wherein an analog sigma-delta modulator is used for converting an output signal of the second analog pre-filter. ### Claim 16 (depends on 12) The fieldbus receiver interface according to claim 12, wherein the primary signal to be processed contains two carrier frequencies, and the analog-digital converter is controlled by a clock generator with an integer multiple of a center frequency of the two carrier frequencies. ### Claim 17 A fieldbus interface, comprising: a fieldbus transmitter interface, including: a computing unit; a digital gate; an analog transmission filter; and a transmitter interface output, wherein the digital gate is connected to the analog transmission filter and the analog transmission filter is connected to the transmitter interface output, wherein the computing unit includes a pulse width modulator and a pulse width modulator clock that is suitable for generating a secondary signal that is coded by means of a duty cycle that is varied over time by the pulse width modulator clock, and wherein the pulse width modulator is suitable for superimposing the secondary signal with a carrier signal so that a digital transmission signal with a frequency of less than 150 kHz is generated, wherein the digital gate and the analog transmission filter are suitable for converting the digital transmission signal into an analog loop signal, and wherein the transmitter interface output is suitable for being connected to a remote station for transmitting the analog loop signal to the remote station; and a fieldbus receiver interface, including: a receiver interface input; a first analog pre-filter; a second analog pre-filter; and a computing unit including an analog digital converter, a direct current deduction filter, and a quadrature demodulator. ### Claim 18 A system, comprising: a fieldbus transmitter interface, including: a computing unit; a digital gate; an analog transmission filter; and a transmitter interface output, wherein the digital gate is connected to the analog transmission filter and the analog transmission filter is connected to the transmitter interface output, wherein the computing unit includes a pulse width modulator and a pulse width modulator clock that is suitable for generating a secondary signal that is coded by means of a duty cycle that is varied over time by the pulse width modulator clock, and wherein the pulse width modulator is suitable for superimposing the secondary signal with a carrier signal so that a digital transmission signal with a frequency of less than 150 kHz is generated, wherein the digital gate and the analog transmission filter are suitable for converting the digital transmission signal into an analog loop signal, and wherein the transmitter interface output is suitable for being connected to a remote station for transmitting the analog loop signal to the remote station; and a fieldbus receiver interface, including: a receiver interface input; a first analog pre-filter; a second analog pre-filter; and a computing unit including an analog digital converter, a direct current deduction filter, and a quadrature demodulator, wherein the fieldbus transmitter interface and the fieldbus receiver interface are interconnected via a current loop. ### Claim 19 A coding method for a fieldbus transmitter interface of a field device or of a control center, comprising: providing a fieldbus transmitter interface, including: a computing unit; a digital gate; an analog transmission filter; and a transmitter interface output, wherein the digital gate is connected to the analog transmission filter and the analog transmission filter is connected to the transmitter interface output, wherein the computing unit includes a pulse width modulator and a pulse width modulator clock that is suitable for generating a secondary signal that is coded by means of a duty cycle that is varied over time by the pulse width modulator clock, and wherein the pulse width modulator is suitable for superimposing the secondary signal with a carrier signal so that a digital transmission signal with a frequency of less than 150 kHz is generated, wherein the digital gate and the analog transmission filter are suitable for converting the digital transmission signal into an analog loop signal, and wherein the transmitter interface output is suitable for being connected to a remote station for transmitting the analog loop signal to the remote station; generating a digital representation of the secondary signal as a duty cycle sequence by the computing unit; transmitting the digital representation of the secondary signal to the pulse-width modulator; converting the digital representation of the secondary signal by the pulse width modulator into a digital transmitter signal having a duty cycle that varies over time and having a frequency of less than 150 kHz; generating an analog loop signal by a digital gate based on the digital signal; and providing the analog loop signal at the transmitter interface output. ### Claim 20 (depends on 19) The coding method according to claim 19, wherein in order to generate the duty cycle sequence a multi-bit sigma delta modulator is used. ### Claim 21 (depends on 19) The coding method according to claim 19, wherein a frequency-dependent pre-distortion of the phase of the digital transmission signal occurs when the duty cycle sequence is generated.