# US 11,442,495 B2 · Separate clocking for components of a graphics processing unit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,442,495 B2 - Document ID: US11442495B2 - Status: Granted - Kind: B2 - Application number: 17/032,701 - Filed: 2020-09-25 - Published: 2021-09-09 - Granted: 2022-09-13 - Earliest claimed: 2020-03-06 - Assignees: Advanced Micro Devices, Inc. - Applicants: Advanced Micro Devices, Inc. - Inventors: Ranjith Kumar Sajja; Sreekanth Godey; Anirudh R. Acharya - Web page: https://patentgrep.com/patent/US11442495B2 ## CPC - G06F 1/08: Clock generators with changeable or programmable clock frequency - G06F 1/10: Distribution of clock signals {, e.g. skew} - G06F 1/12: Synchronisation of different clock signals {provided by a plurality of clock generators} - G06F 1/3228: Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands - G06F 1/324: by lowering clock frequency - G06F 1/3243: {Power saving in microcontroller unit} - G06F 9/505: {considering the load} - G06F 11/3409: {for performance assessment} - G06F 11/3433: {for load management (allocation of a server based on load conditions G06F9/505; load rebalancing G06F9/5083; redistributing the load in a network by a load balancer H04L67/1029)} - G06F 11/348: {Circuit details, i.e. tracer hardware} - G06F 2201/88: Monitoring involving counting - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract Systems and methods related to controlling clock signals for clocking shader engines modules (SEs) and non-shader-engine modules (nSEs) of a graphics processing unit (GPU) are provided. One or more dividers receive a clock signal CLK and output a clock signal CLKA to the SEs and output a clock signal CLKB to the nSEs. The frequencies of CLKA and CLKB are independently selected based on sets of performance counter data monitored at the SEs and nSEs, respectively. The clock signal frequency for either the SEs or the nSEs is reduced when the corresponding sets of performance counter data indicates a comparatively lower processing workload for the SEs or for the nSEs. ## Claims ### Claim 1 A method comprising: independently adjusting at least one of a first frequency of a first clock signal received by one or more shader engine modules and a second frequency of a second clock signal received by one or more non-shader-engine modules of a graphics processing unit based on a quantity of events associated with a first workload of the one or more shader engine modules and a quantity of events associated with a second workload of the one or more non-shader-engine modules. ### Claim 2 (depends on 1) The method of claim 1, wherein independently adjusting the at least one of the first frequency and the second frequency is based on first performance counter data indicative of the first workload and second performance counter data indicative of the second workload, the method further comprising: calculating a differential between the first performance counter data and the second performance counter data, wherein independently adjusting the at least one of the first frequency and the second frequency is performed based on the differential. ### Claim 3 (depends on 1) The method of claim 1, wherein independently adjusting the at least one of the first frequency and the second frequency comprises: sending at least one control signal to a divider; with the divider, sending the first clock signal with the first frequency to the one or more shader engine modules based on the at least one control signal; and with the divider, sending the second clock signal with the second frequency to the one or more non-shader-engine modules based on the at least one control signal. ### Claim 4 (depends on 1) The method of claim 1, wherein independently adjusting the at least one of the first frequency and the second frequency comprises: sending a first control signal to a first plurality of dividers; sending a second control signal to a second plurality of dividers; with the first plurality of dividers, sending the first clock signal with the first frequency to the one or more shader engine modules based on the first control signal; and with the second plurality of dividers, sending the second clock signal with the second frequency to the one or more non-shader-engine modules based on the second control signal. ### Claim 5 (depends on 2) The method of claim 2, further comprising: determining that the differential is less than a lower threshold of a predefined guardband for more than a predefined time period, wherein independently adjusting the at least one of the first frequency and the second frequency comprises: independently adjusting the first frequency of the first clock signal without adjusting the second frequency of the second clock signal. ### Claim 6 (depends on 2) The method of claim 2, further comprising: determining that the differential is greater than an upper threshold of a predefined guardband for more than a predefined time period, wherein independently adjusting the at least one of the first frequency and the second frequency comprises: independently adjusting the second frequency of the second clock signal without adjusting the first frequency of the first clock signal. ### Claim 7 (depends on 2) The method of claim 2, wherein independently adjusting the at least one of the first frequency and the second frequency comprises: determining that the differential is between an upper threshold and a lower threshold of a predefined guardband, wherein independently adjusting the at least one of the first frequency and the second frequency comprises: adjusting the first frequency of the first clock signal to match the second frequency of the second clock signal. ### Claim 8 A graphics processing unit (GPU) comprising: a divider; a plurality of shader engine modules coupled to the divider and configured to receive a first clock signal from the divider; a plurality of non-shader-engine modules coupled to the divider and configured to receive a second clock signal from the divider; and a controller configured to output a first control signal and a second control signal to the divider to selectively control a first frequency of the first clock signal and a second frequency of the second clock signal based on a quantity of events associated with a first detected workload of the plurality of shader engine modules and a quantity of events associated with a second detected workload of the plurality of non-shader-engine modules. ### Claim 9 (depends on 8) The GPU of claim 8, further comprising: a first plurality of performance counters configured to generate first performance counter data indicative of the first detected workload of the plurality of shader engine modules; and a second plurality of performance counters configured to generate second performance counter data indicative of the second detected workload of the plurality of non-shader-engine modules. ### Claim 10 (depends on 9) The GPU of claim 9, wherein the controller is further configured to: receive the first performance counter data from the first plurality of performance counters; receive the second performance counter data from the second plurality of performance counters; and independently adjust at least one of the first frequency and the second frequency based on the first performance counter data and the second performance counter data. ### Claim 11 (depends on 10) The GPU of claim 10, wherein the controller is further configured to: calculate a differential between the first performance counter data and the second performance counter data; and independently adjust at least one of the first frequency and the second frequency based on the differential. ### Claim 12 (depends on 11) The GPU of claim 11, wherein the controller is further configured to: determine that the differential is less than a lower threshold of a predefined guardband for more than a predefined time period; and independently adjust the first frequency of the first clock signal without adjusting the second frequency of the second clock signal. ### Claim 13 (depends on 11) The GPU of claim 11, wherein the controller is further configured to: determine that the differential is greater than an upper threshold of a predefined guardband for more than a predefined time period; and independently adjust the second frequency of the second clock signal without adjusting the first frequency of the first clock signal. ### Claim 14 (depends on 11) The GPU of claim 11, wherein the controller is further configured to: determine that the differential is between an upper threshold and a lower threshold of a predefined guardband; and adjust the first frequency of the first clock signal to match the second frequency of the second clock signal. ### Claim 15 A graphics processing unit (GPU) comprising: a plurality of dividers; a plurality of shader engine modules configured to receive first clock signals, each having a first frequency, from a first subset of the plurality of dividers; a plurality of non-shader-engine modules configured to receive second clock signal signals, each having a second frequency, from a second subset of the plurality of dividers; and a controller configured to output a first control signal to the first subset of the plurality of dividers to selectively control the first frequency of the first clock signals and to output a second control signal to the second subset of the plurality of dividers to selectively control the second frequency of the second clock signals based on a quantity of events associated with a first detected workload of the plurality of shader engine modules and a quantity of events associated with a second detected workload of the plurality of non-shader-engine modules. ### Claim 16 (depends on 15) The GPU of claim 15, further comprising: a first plurality of performance counters configured to generate first performance counter data indicative of the first detected workload of the plurality of shader engine modules; and a second plurality of performance counters configured to generate second performance counter data indicative of the second detected workload of the plurality of non-shader-engine modules. ### Claim 17 (depends on 16) The GPU of claim 16, wherein the controller is further configured to: receive the first performance counter data from the first plurality of performance counters; receive the second performance counter data from the second plurality of performance counters; calculate a differential between the first performance counter data and the second performance counter data; and independently adjust at least one of the first frequency and the second frequency based on the differential. ### Claim 18 (depends on 17) The GPU of claim 17, wherein the controller is further configured to: determine that the differential is less than a lower threshold of a predefined guardband for more than a predefined time period; and independently adjust the first frequency without adjusting the second frequency. ### Claim 19 (depends on 17) The GPU of claim 17, wherein the controller is further configured to: determine that the differential is greater than an upper threshold of a predefined guardband for more than a predefined time period; and independently adjust the second frequency without adjusting the first frequency. ### Claim 20 (depends on 17) The GPU of claim 17, wherein the controller is further configured to: determine that the differential is between an upper threshold and a lower threshold of a predefined guardband; and adjust the first frequency to match the second frequency.