# US 11,442,318 B2 · Dual-gate array substrate and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,442,318 B2 - Document ID: US11442318B2 - Status: Granted - Kind: B2 - Application number: 16/656,969 - Filed: 2019-10-18 - Published: 2020-02-13 - Granted: 2022-09-13 - Earliest claimed: 2016-02-02 - Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd. - Applicants: BOE Technology Group Co., Ltd.; Chengdu BOE Optoelectronics Technology Co., Ltd. - Inventors: Pengcheng Zang; Weiyun Huang; Xiaojing Qi; Tingliang Liu - Web page: https://patentgrep.com/patent/US11442318B2 ## CPC - G02F 1/134363: {for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]} - G02F 1/13394: {spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence)} - G02F 1/134372: {for fringe field switching [FFS] where the common electrode is not patterned} - G02F 1/136286: {Wiring, e.g. gate line, drain line} - G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} - G02F 1/134318: {having a patterned common electrode} - G02F 1/136218: {Shield electrodes} - G02F 1/136295: {Materials; Compositions; Manufacture processes} - G02F 2201/121: common or background - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS ## Abstract The present disclosure relates to a dual-gate array substrate and a display device. A dual-gate array substrate includes: a plurality of gate lines arranged in a first direction and each extended in a second direction that is perpendicular to the first direction; a plurality of primary signal lines and secondary signal lines arranged alternately in the second direction and extended in the first direction; and a plurality of pixel units. The primary signal lines are connected to a drive unit, and connected respectively to the pixel units that are adjacent thereto. Common electrodes include a plurality of main electrodes and a plurality of branching electrodes. An orthographic projection of the main electrode on the dual-gate array substrate does not overlap with those of corresponding ones, adjacent to the main electrode, of the pixel electrodes and at least covers the primary signal line. ## Claims ### Claim 1 A dual-gate array substrate, comprising: a plurality of gate lines arranged in a first direction, each of the gate lines being extended in a second direction that is perpendicular to the first direction; a plurality of primary signal lines and secondary signal lines arranged alternately in the second direction and extended in the first direction; and a plurality of pixel units each enclosed and defined by jointing adjacent two of the gate lines insulative with corresponding ones of the primary signal lines or the secondary signal lines, the pixel units each including pixel electrodes, the primary signal lines being connected to a drive unit and being connected respectively to ones of the pixel units that are adjacent thereto; wherein the dual-gate array substrate further comprises common electrodes located in a different layer from the pixel units and comprising a plurality of main electrodes and a plurality of branching electrodes; wherein the secondary signal lines are connected to the common electrodes; wherein an orthographic projection of one of the main electrodes on the dual-gate array substrate at least covers a corresponding one of the primary signal lines and does not overlap orthographic projections of two pixel electrodes adjacent to the corresponding one of the primary signal lines on the dual-gate array substrate; and wherein a line width of each of the secondary signal lines is not greater than a line width of each of the primary signal lines. ### Claim 2 (depends on 1) The dual gate array substrate according to claim 1, wherein the main electrodes of the common electrodes are disposed in an extension direction of the primary signal lines, the branching electrodes are disposed to be parallel to the main electrodes, a pattern of the common electrodes formed by any adjacent two of the main electrodes and the secondary electrodes between the two of the main electrodes corresponds to a corresponding one of the pixel units; wherein any adjacent two of the main electrodes include a first main electrode and a second main electrode, an orthographic projection of the first main electrode on the array substrate covers an orthographic projection of a corresponding one of the primary signal lines on the dual-gate array substrate, and does not overlap orthographic projections of the ones, adjacent to the corresponding one of the primary signal lines, of the pixel electrodes on the dual-gate array substrate; and an orthographic projection of the second main electrode, adjacent to the first main electrode, on the dual-gate array substrate covers an orthographic projection of a corresponding one of the secondary signal lines on the dual-gate array substrate and does not overlap orthographic projections of the ones, adjacent to the corresponding one of the secondary signal lines, on the dual-gate array substrate. ### Claim 3 (depends on 2) The dual-gate array substrate according to claim 2, wherein the orthographic projection of the second main electrode, adjacent to the first main electrode, on the dual-gate array substrate coincides with the orthographic projection of the corresponding one of the secondary signal lines on the dual-gate array substrate. ### Claim 4 (depends on 1) The dual gate array substrate according to claim 1, wherein the main electrodes of the common electrodes are disposed in an extension direction of the primary signal lines respectively, the branching electrodes are disposed to be parallel to the main electrodes, a pattern of the common electrodes formed by any adjacent two of the main electrodes and the secondary electrodes between the two of the main electrodes corresponds to a corresponding one of the pixel units; and wherein orthographic projections of the main electrodes on the array substrate cover orthographic projections of the primary signal lines on the dual-gate array substrate respectively, and do not overlap orthographic projections of the ones, adjacent to the primary signal lines, of the pixel electrodes on the dual-gate array substrate; and viewed in a direction orthogonal to the dual-gate array substrate, no main electrode is provided over the secondary signal lines. ### Claim 5 (depends on 1) The dual-gate array substrate according to claim 1, wherein the main electrodes of the common electrodes are disposed in an extension direction of the primary signal lines respectively, the branching electrodes are disposed in a direction across the primary signal lines, and a pattern of the common electrodes formed by any adjacent two of the main electrodes and the branching electrodes between the two main electrodes corresponds to adjacent two of the pixel units; and wherein orthographic projections of adjacent two of the main electrodes on the dual-gate array substrate at least cover the primary signal lines and do not overlap orthographic projections of the ones, adjacent the primary signal lines, of the pixel electrodes on the dual-gate array substrate; and a pattern of the branching electrodes at a boundary between adjacent two of the adjacent pixel units is continuous. ### Claim 6 (depends on 1) The dual-gate array substrate according to claim 1, wherein, the secondary signal lines are made of metal or transparent oxide. ### Claim 7 (depends on 6) The dual-gate array substrate according to claim 6, wherein, the secondary signal lines are made of tin indium oxide. ### Claim 8 (depends on 1) The dual-gate array substrate according to claim 1, further comprising a photo spacer disposed at either side of each of the secondary signal lines and the photo spacer has two ends with different sizes; and wherein between each pair of the primary signal line and the secondary signal line and within a space between adjacent two of the pixel units, the thin film transistor is disposed a side of the space close to the primary signal line and a metal pad is disposed a side of the space close to the corresponding secondary signal line. ### Claim 9 (depends on 8) The dual-gate array substrate according to claim 8, wherein the photo spacer has a frustoconical shape. ### Claim 10 (depends on 8) The dual-gate array substrate according to claim 8, further comprising a metal pad configured such that an end of the photo spacer with a greater size is disposed on a side surface of the metal pad facing away from the pixel electrode, wherein the metal pad and source and drain electrodes of the thin film transistor are different portions of a same metal film. ### Claim 11 (depends on 1) A display device comprising a color film substrate, wherein, the display device further comprises the dual-gate array substrate according to claim 1. ### Claim 12 (depends on 11) The display device according to claim 11, wherein, a black matrix is provided on the color film substrate, at a position corresponding to the secondary signal lines in the dual-gate array substrate, wherein an orthographic projection of the black matrix on the dual-gate array substrate coincides with an orthographic projection of the secondary signal lines on the dual-gate array substrate.