Error correction code (ECC) operations in memory for providing redundant error correction

A method for performing an error correction code (ECC) operation, comprising:

• encoding data with a first code;
• creating cross-over parity data for a number of cross-over bits by performing an XOR operation on blocks of bits located at intersections of column codewords and row codewords;
• encoding the data and the parity data with a second code;
• and
• storing the encoded data in an array of memory cells.

An apparatus, comprising:

• a memory device;
• a controller coupled to the memory device, wherein the controller is configured to:
• detect an error in data while performing a read operation;
• decode the data using the parity data and compute a cross-over parity syndrome wherein the cross-over parity syndrome is based on cross-over parity data calculated from cross-over bits located at intersections of row component codewords and column component codewords;
• and
• correct a first error in the data by performing an XOR operation on the cross-over parity syndrome in response to reaching an error floor when decoding the data.