Two-capacitor digital-to-analog converter

A method for digital-to-analog conversion, the method comprising:

• selecting a mode condition for an active bit of a digital word;
• determining a first mode or a second mode for the active bit based on a value of the active bit and the selected mode condition;
• executing an input phase to charge or discharge an averaging circuit including a first capacitor directly coupled between a first terminal of a redistribution switch and a ground and a second capacitor directly coupled between a second terminal of the redistribution switch and the ground, the input phase including:
• in a first mode, charging or discharging the first capacitor and a replica input capacitance according the value of the active bit, and
• in a second mode, charging or discharging the second capacitor and the replica input capacitance according to the value of the active bit;
• and
• executing an average phase, the average phase including:
• controlling the redistribution switch to couple the first capacitor and the second capacitor together to generate an average voltage for the active bit,
• coupling the average voltage to a buffer amp having an input capacitance, and
• coupling the replica input capacitance and the input capacitance together to generate an adjusted average voltage for the active bit at an input of the buffer amp.

A system for digital to analog conversion, comprising:

• a phase and mode controller configured to receive bits of a digital word and to output switching signals according to an input phase, an average phase, or an output phase of a conversion process, and according to a first mode or a second mode determined by each bit in the digital word received at an input to the system;
• an averaging circuit including a first capacitor and a second capacitor, the averaging circuit configured to charge or discharge the first capacitor or the second capacitor during an input phase and configured to couple the first capacitor and the second capacitor together during an average phase in order to generate an average voltage;
• an output circuit including an opamp configured for unity gain, the opamp having an input capacitance at an input to the opamp, the output circuit configured to generate an output voltage based on the average voltage received from the averaging circuit and configured to couple the output voltage to an output of the system during the output phase;
• and
• a capacitance compensation circuit including a transistor configured to generate a replica input capacitance that is substantially equal to the input capacitance of the opamp, the capacitance compensation circuit configured to couple the replica input capacitance and the input capacitance of the opamp together during an average phase to adjust the average voltage to compensate for the input capacitance of the opamp.